TFT array substrate, and liquid crystal display panel

A technology of array substrate and substrate, applied in the field of liquid crystal display panel

Active Publication Date: 2012-01-04
SHARP KK
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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  • TFT array substrate, and liquid crystal display panel
  • TFT array substrate, and liquid crystal display panel
  • TFT array substrate, and liquid crystal display panel

Examples

Experimental program
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Embodiment approach 1

[0100] when based on figure 1 and figure 2 One embodiment of the present invention will be described as follows.

[0101] figure 1 It is a figure showing the schematic structure of the TFT array substrate 20 of this embodiment.

[0102] The TFT array substrate 20 of this embodiment has the same Figure 16 The described TFT array substrate 20 has almost the same schematic configuration.

[0103] That is, various wirings (wiring layers), driving circuits, and the like are provided in the peripheral region 24 of the TFT array substrate 20 .

[0104] Specifically, as various wirings, a low-potential-side power supply wiring 70 (signal wiring for scanning line driving circuit) as a trunk wiring and a clock wiring as a trunk wiring are provided along the Y direction of the TFT array substrate 20 . Line 72 (signal wiring for scanning line driving circuit). In detail, one low-potential side power line 70 is provided in the direction from the substrate edge 26 toward the displ...

Embodiment approach 2

[0151] if based on image 3 and Figure 4 Other embodiments of the present invention will be described as follows. image 3 It is a figure showing the schematic structure of the TFT array substrate 20 of this embodiment. in addition, Figure 4 yes image 3 B-B line sectional view.

[0152] In addition, for convenience of description, components having the same functions as those in the drawings described in Embodiment 1 are denoted by the same reference numerals, and description thereof will be omitted.

[0153] The TFT array substrate 2 of the present embodiment is different from the TFT array substrate 20 of the first embodiment in the form of the contact holes 100 .

[0154] Specifically, the contact hole 100 in this embodiment differs from the contact hole 100 in Embodiment 1 in the number of vias provided for one contact hole 100 .

[0155] That is, in the contact hole 100 of Embodiment 1, two paths of the main wiring path 110 and the branch wiring path 112 are prov...

Embodiment approach 3

[0173] if based on Figure 6 and Figure 7 Other embodiments of the present invention will be described as follows. Figure 6 and Figure 7 It is a figure showing the schematic structure of the TFT array substrate 20 of this embodiment.

[0174] In addition, for convenience of description, components having the same functions as those in the drawings described in the above-described embodiments are given the same reference numerals, and description thereof will be omitted.

[0175] The TFT array substrate 20 of this embodiment differs in the shape of wiring from the TFT array substrate 20 of the above-described embodiments. Specifically, the wiring extending in the Y direction is formed in a ladder shape.

[0176] exist Figure 6 and Figure 7 In the illustrated example, the low-potential-side power supply wiring 70 as the external wiring close to the substrate edge 26 is formed in a ladder shape.

[0177] Specifically, a rectangular notch 76 is provided on the low pote...

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PUM

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Abstract

Disclosed is a TFT array substrate (20) wherein TFT elements and pixel electrodes are arranged as a matrix. A gate bus line is formed from a first metal material (M1), a source bus line is formed from a second metal material (M2), and a pixel electrode is formed from a third metal material (M3). In a peripheral region (24), a clock wiring line (72) that is formed from the first metal material (M1), and a branch wiring line (74) that is formed from the second metal material (M2) are connected with each other at a connection part (80) via a connection conductor (102) that is formed from the third metal material (M3). The connection part (80) is provided with a branch wiring via (112) which expose the branch wiring line (74) through the connection conductor (102). At least a part of the branch wiring via (112) overlaps the clock wiring line (72) when viewed in plan.

Description

technical field [0001] The present invention relates to a TFT array substrate provided with TFT elements on an insulating substrate, and a liquid crystal display panel using the TFT array substrate. Background technique [0002] Conventionally, a TFT array substrate in which TFT (Thin Film Transistor: thin film transistor) elements are formed on an insulating substrate has been widely used in display devices such as liquid crystal display panels and sensor devices. In addition, the TFT element is connected with wiring to each electrode thereof. [0003] Specifically, a gate bus line as wiring is connected to the gate electrode of the TFT element, and a source bus line as wiring is connected to the source electrode. [0004] In addition, when the TFT array substrate is used in a liquid crystal display panel, the pixel electrodes are connected to the drain electrodes. [0005] When the TFT elements are arranged in a matrix, the gate bus lines and the source bus lines are pro...

Claims

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Application Information

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IPC IPC(8): G02F1/1368G02F1/1345G09F9/30
CPCG02F1/1345G02F1/13454G02F1/1339G02F1/136286H01L27/124G02F1/13452G02F1/1368G02F1/133345G02F1/134336H01L27/1222
Inventor 小笠原功山田崇晴吉田昌弘堀内智田中信也菊池哲郎
Owner SHARP KK
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