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High-density integrated circuit packaging structure, packaging method for packaging structure, and integrated circuit

An integrated circuit and packaging structure technology, which is applied to the high-density integrated circuit packaging structure and its packaging field, can solve the problems of not meeting actual requirements, low packaging production efficiency, and increased production difficulty, so as to improve production efficiency and reduce packaging costs. Low, the effect of improving frequency characteristics

Active Publication Date: 2012-10-03
CHINA CHIPPACKING TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

It turns out that the characteristic size of integrated circuit chip manufacturing technology is micron level, or even wider, so the area of ​​the chip is generally larger. The existing DIP8 is designed according to the chip manufacturing technology at that time. In order to accommodate a larger chip area, the DIP8 The size of the package is very large, not only consumes a lot of raw materials, the packaging production efficiency is low, the integrated circuit needs to occupy a large area for soldering on the printed circuit board, and the cost is high, and the current DIP8 is used to package today's small-size chip products, Due to the relatively long lead wire, the frequency characteristic decreases, the internal resistance increases obviously, the quality is difficult to guarantee, and the production difficulty increases
With the advancement of chip manufacturing technology from the micron level to the submicron level, or even the nanometer level (32nm has matured and can be mass-produced), the chip area is reduced geometrically. At the same time, the power consumption and frequency characteristics of the chip have been proposed Higher requirements, the existing DIP8 package can no longer meet the actual requirements

Method used

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  • High-density integrated circuit packaging structure, packaging method for packaging structure, and integrated circuit
  • High-density integrated circuit packaging structure, packaging method for packaging structure, and integrated circuit
  • High-density integrated circuit packaging structure, packaging method for packaging structure, and integrated circuit

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Embodiment 1

[0044] A high-density integrated circuit package structure of the utility model includes a metal lead frame, the metal lead frame includes a base island of the lead frame, inner lead wires and outer lead wires, a chip fixed on the base island of the lead frame, and the chip and the lead frame. The micro-connection wires between the inner pins, and the rectangular parallelepiped plastic packaging structure that seals the metal lead frame, chip and micro-connection wires, the length of the plastic packaging structure is A 1 Satisfied relationship: 4.700mm+(B-8)x1.8mm / 2≤A 1 ≤9.200mm+(B-8)x1.8mm / 2; width A of the plastic package structure 2 Satisfy the relationship: 1.662mm≤A 2 ≤5.000mm; thickness A of plastic-encapsulated structure 3 Satisfy the relationship: 0.700mm≤A 2 ≤3.000mm; B is the number of outer lead wires, and B is an integer satisfying 6≤B≤40. The packaging structure with the number of outer lead pins being 8 is taken as an example, and the high-density integrated...

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Abstract

The invention relates to a high-density integrated circuit packaging structure. The packaging structure comprises a metal lead frame, wherein the metal lead frame comprises a lead frame base island, an inner pin wire, outer pin wires, a chip fixed to the lead frame base island, a micro connection wire arranged between the chip and the inner pin wire, and a cuboid plastic packaging structure for sealing the metal lead frame, the chip and the micro connection wire; the length A1 of the plastic packaging structure accords with the relation: A1 is more than or equal to 4.700 millimeters+(B-8)*1.8millimeters / 2 and is less than or equal to 9.200 mm+(B-8)*1.8 millimeters / 2; the width A2 of the plastic packaging structure accords with the relation: A2 is more than or equal to 1.662 millimeters and is less than or equal to 5.000 millimeters; the thickness A3 of the plastic packaging structure accords with the relation: A3 is more than or equal to 0.700 millimeter and is less than or equal to 3.000 millimeters; and B is the number of the outer pin wires and is an integral number which is more than or equal to 6 and is less than or equal to 40. The packaging structure can meet the requirements of development from a micro scale to submicron and nanometer scales in a technology for manufacturing the chip, and the defects of low circuit integration level, high packaging cost and low performance of the packaging structure in the prior art are overcome.

Description

technical field [0001] The present invention relates to an integrated circuit packaging structure and its forming method, in particular to a high-density integrated circuit packaging structure and its packaging method, so as to increase the circuit integration degree in the packaged integrated circuit, reduce the packaging cost and improve the packaging efficiency of the integrated circuit. reliability. Background technique [0002] Integrated circuits are the core of modern technology and the basis for the development of modern science and technology. Scientific research must rely on instruments and equipment with integrated circuits as the core; in addition, it is the foundation of modern human civilization, which fundamentally changes people's lifestyles. Such as the Internet of Things, the Internet, computers, TVs, refrigerators, mobile phones, IPAD, IPHONE, various automatic control equipment, etc., all rely on integrated circuits to realize their intelligent functions....

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/31H01L23/495H01L21/768H01L21/56
CPCH01L2924/0002
Inventor 梁大钟施保球饶锡林刘兴波
Owner CHINA CHIPPACKING TECH