Test method used for monitoring active region damage caused by wet etching

Abstract

The invention generally relates to a monitoring test method in the field of manufacture of semiconductors and particularly relates to a test method used for monitoring active region damage caused by wet etching. According to the test method used for monitoring the active region damage caused by wet etching provided by the invention, crossover is realized through a triple-gate layer and a dual-gate layer in a wafer well region; and in the overlapping position of the triple-gate layer and the dual-gate layer, the multiple active region damages caused by wet etching can be obviously observed, sothat the active region damage problem caused by wet etching in a process research and development stage can be discovered in time.

Description

technical field [0001] The present invention generally relates to a monitoring and testing method in the field of semiconductor manufacturing, more precisely, the present invention relates to a testing method for monitoring active area damage caused by wet etching. Background technique [0002] The traditional triple gate oxide process flow is, for example, Figure 1-3 As shown, first perform ion implantation (Implant, referred to as IMP) on the P well (P-well) or N well (N-well), grow a thick oxide layer (thick gate oxide) on the IMP region, and use triple gate (triple gate) gate, referred to as TG) layer photolithography to form a pattern, and wet-etch the area where the TG layer is developed. If the thick oxide layer, TG layer photolithography or wet etching process is not optimized, then in The etched area of ​​the TG layer can randomly find that the active area is damaged, but it cannot be easily found; then grow a medium-thickness oxide layer (medium gate oxide), and u...

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Problems solved by technology

[0002] The traditional triple gate oxide process flow is, for example, Figure 1-3 As shown, first perform ion implantation (Implant, referred to as IMP) on the P well (P-well) or N well (N-well), grow a thick oxide layer (thick gate oxide) on the IMP region, and use triple gate (triple gate) gate, referred to as TG) layer photolithography to form a pattern, and wet-etch the area where the TG layer is developed. If the thick oxide layer, TG layer photolithography or wet etching process is not optimized, then in The etched area of ​​the TG layer can randomly find that the active area is damaged, but it cannot be easily found; then grow a medium-thick oxide layer (medium gate oxide), and use a double gate (Double gate, DG) layer photolithography to form a pattern , also use wet etching to open the area where the DG layer is developed. If the medium-thickness oxide layer, DG photolithography or wet etching process is not optimized, active area is damaged, the same cannot be easily detected

That is, in traditional process development, if the photolithography or wet etching process is not optimized, the damage caused by wet etching is very slight and difficult to detect, and can only be discovered after passing some reliability tests in the later stage of process development , not only prolongs the process development cycle, but also the gate oxide layer grown on these damaged active regions may cause reliability problems of the device

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