Instruction prefetching method and device

Abstract

The invention relates to an instruction prefetching method and device. The instruction prefetching device is used for providing an instruction prefetching service for a processor core and comprises an instruction prefetching control unit and an instruction caching unit, wherein the instruction prefetching control unit is used for receiving a prefetching request provided by the processor core, searching an instruction corresponding to the prefetching request in the instruction caching unit on the basis of the prefetching request or indicating that the instruction caching unit acquires the instruction corresponding to the prefetching request from an off-chip main memory and indicating that the instruction caching unit provides the instruction corresponding to the prefetching request for the processor core on the basis of the prefetching request; and the instruction caching unit is used for storing the instruction, responding to the instruction of the instruction prefetching control unit, acquiring the instruction corresponding to the prefetching request from the off-chip main memory and providing the instruction corresponding to the prefetching request for the processor core. According to the instruction prefetching method and device disclosed by the invention, instruction prefetching of a multi-core processor is realized in a simpler mode, management logic of hardware instruction storage is simplified and process efficiency of the processor is improved.

Description

technical field [0001] The present invention relates to the field of computer technology, and more specifically, the present invention relates to an instruction prefetching method and a prefetching device for multi-core processors. Background technique [0002] A multi-core processor refers to the integration of multiple processor cores and related functional components into one processor chip, thereby forming a processor structure including multiple processor cores. Compared with previous single-core processors, due to the integration of multiple processor cores, the data processing capability of the multi-core processor is greatly improved. [0003] In the process of the multi-core processor executing the program, the local instruction buffer with limited capacity of each processor core cannot meet the storage of large-scale programs, and it is necessary to continuously load the required instructions from the off-chip main memory into the Native instruction buffering. Ho...

AI Technical Summary

Problems solved by technology

However, the access speed of the off-chip main memory is difficult to meet the processing speed requirements of the processor cores, and the multi-core processor usually has multiple processor cores competing to access the off-chip main memory during actual operation, which exacerbates the In addition to the difficulty of obtaining instructions, the data processing capabilities of multi-core processors cannot be fully utilized.

[0004] Aiming at the problem that the processing capability of the processor cannot be fully utilized due to the acquisition of instructions, the Chinese patent application...

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