Dynamic bus frequency modulation method of off-chip memory and system thereof

An off-chip memory and dynamic frequency modulation technology, applied in the field of on-chip systems, can solve problems such as unfavorable system development and debugging, cumbersome software processing, etc., and achieve the effects of reducing software overhead, wide applicability, and simple frequency modulation process

Active Publication Date: 2012-07-11
LEADCORE TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] However, for the existing SOC chip to adjust the SDAM bus operating frequency method, multiple interactions between multiple processor cores ar

Method used

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  • Dynamic bus frequency modulation method of off-chip memory and system thereof
  • Dynamic bus frequency modulation method of off-chip memory and system thereof
  • Dynamic bus frequency modulation method of off-chip memory and system thereof

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Embodiment Construction

[0031] The first embodiment of the present invention relates to a bus dynamic frequency modulation method of an off-chip memory. The principle is as follows: when the CPU core performs frequency modulation, it first sends an SDRAM initialization command to the SDC controller. During the process of executing the SDRAM initialization command, the SDC controller queues up for access to the SDRAM outside the SDC controller, that is, At this stage, each CPU core cannot read and write access to off-chip SDRAM, and the SDRAM bus is in an idle state. Therefore, the operating frequency of the SDRAM bus can be adjusted by utilizing the idle state of the SDRAM bus.

[0032] In this embodiment, it will be described by taking CPU1 in the SOC chip to adjust the bus operating frequency of the SDRAM as an example.

[0033] The specific process is as image 3As shown, in step 301, CPU1 sets the duration of NOP1 during SDRAM initialization. Because in this embodiment, the SDRAM initializatio...

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Abstract

The invention relates to an on-chip system, and discloses a dynamic bus frequency modulation method of an off-chip memory and a system of the method. In the invention, the frequency modulation of an SDRAM (synchronous dynamic random access memory) bus is completed by use of the initialization state of the SDRAM. The operation of an SDC (serial data controller) executing SDRAM initialization command ensures that the access of each CPU (central processing unit) in a SOC (system on chip) chip to the SDRAM is in the halt state, so that the SDRAM bus of the system is idle, and no influences is generated on the SDRAM initialization process by modulating the SDRAM bus frequency. Therefore, the SDRAM bus frequency modulation can be realized by actively initiating the SDRAM initialization operation, so that the dynamic frequency modulation of the SDRAM bus obviates the complex software interaction among a plurality of processors, thereby greatly simplifying the SDRAM bus frequency modulation process.

Description

technical field [0001] The invention relates to an on-chip system, in particular to a technology for adjusting the operating frequency of an off-chip memory in the on-chip system. Background technique [0002] A multi-core System On Chip ("SOC" for short) chip includes two or more physical processor cores (that is, the central processing unit CPU in the SOC chip), and different processor cores can share external memory. In practical applications, when the off-chip memory SDRAM is used as the code running space and data storage space of the multi-core SOC chip, the multi-core SOC chip has different bandwidth requirements for SDRAM access under different application states. For example, when performing concurrent multitasking operations, CPU1 plays MP3 format files, CPU2 runs the physical layer communication protocol stack, CPU3 codes and decodes voice signals, and CPU4 runs high-level communication protocol stacks. The demand for access bandwidth is large, so the off-chip me...

Claims

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Application Information

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IPC IPC(8): G06F1/04
Inventor 朱笠史公正
Owner LEADCORE TECH
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