Yield increasing system of excursion management in semiconductor manufacturing process

Abstract

The invention discloses a yield increasing system of excursion management in the semiconductor manufacturing process, wherein the yield increasing system comprises an electronic data collecting and recording module as well as an executing module, the executing module comprises a plurality of sub modules which are arranged in sequence; each sub module comprises an executing part and a checking part; except for the sub module arranged in the first place, the executing part of each sub module is connected with the checking part of the previous sub module of the sun module; except for the sub module arranged in the last place, the checking part of each sub module is connected with the executing part of the later sub module of the sub module; and the checking part of each sub module is connected with the electronic data collecting and recording module. The yield increasing system of excursion management in the semiconductor manufacturing process, disclosed by the invention, has the following advantage that: wafers with potential risks in the semiconductor manufacturing process are recorded, intensively analyzed and distributed to the corresponding executing module so that the risk are minimized.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a yield improvement system for offset management in semiconductor manufacturing processes. Background technique [0002] The manufacturing process of semiconductor integrated circuits involves hundreds of process steps and lasts for tens of days. During this long process, the process environment and equipment are undergoing microscopic changes every second. Naturally, each wafer cannot be treated exactly the same. . Therefore, sorting each wafer after all procedures are completed or during the process is one of the key issues in the semiconductor integration process. [0003] Traditional semiconductor factories conduct electrical performance tests after the wafers are off-line to screen out those wafers that do not meet the specifications. However, electrical performance tests are usually only selected for some positions on the wafer, and cannot cover all parts of the ...

AI Technical Summary

Problems solved by technology

[0003] Traditional semiconductor factories conduct electrical performance tests after the wafers are off-line to screen out those wafers that do not meet the specifications. However, electrical performance tests are usually only selected for some positions on the wafer, and cannot cover all parts of the wafer. So sometimes some bad wafers will be missed, causing these wafers that do not meet the specifications to be packaged and shipped, which causes resources to be wasted

Statistical Process Control (SPC), on the other hand, is applied to in-line process monitoring of semiconductor manufacturing processes, which can monitor each step of the process and various equipment, while having the ability to terminate wafers that are out of specification, but even SPC can Can't get full coverage, will miss some runaways and bug buildup

Images