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Method and apparatus for performing hardware assisted placement

A layout and hardware technology, applied in the field of implementing hardware-assisted layout and devices, can solve problems such as stale information, inability to provide timing critical paths, and adverse effects of maximum frequency

Active Publication Date: 2012-07-18
ALTERA CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Past hardware-assisted placement techniques suffer from a number of limitations associated with obtaining cost metrics for use in placement
For example, hardware-assisted layout techniques of the past suffer from the use of information that is stale when computing the bounding box costs of the nets used to bound the terminals of the nets
Past hardware-assisted placement techniques have not been able to provide timing-critical path considerations, which adversely affects the maximum frequency at which a design can run

Method used

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  • Method and apparatus for performing hardware assisted placement
  • Method and apparatus for performing hardware assisted placement
  • Method and apparatus for performing hardware assisted placement

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Embodiment Construction

[0023] In the following description, for purposes of explanation, specific nomenclature is set forth in order to provide a thorough understanding of some embodiments of the invention. It will be apparent to those skilled in the art that some embodiments of the invention may be practiced without requiring the specific details described. In other instances, well-known circuits, devices and procedures are shown in block diagram form in order to avoid unnecessarily obscuring the embodiments of the present invention.

[0024] figure 1 is a flowchart illustrating a method for designing a system on a target device according to an exemplary embodiment of the present invention. The target device can be FPGA, ASIC, structured ASIC or other devices. According to one embodiment, in figure 1 The process shown in can be performed by a computer aided design (CAD) / electronic design automation (EDA) tool implemented on a computer system. At 101, the system is synthesized. Synthesis incl...

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Abstract

A method for designing a system on a target device is disclosed. A first plurality of components in the system are assigned to be placed by an computer aided design (CAD) tool based on a criterion. A second plurality of components in the system are assigned to be placed by a hardware placement unit based on the criterion. Placement results from the CAD tool and the hardware placement unit are used to generate a placement solution for the system on the target device. Other embodiments are described and claimed.

Description

[0001] priority [0002] This application claims priority to a previously filed US Patent Application for Invention, Serial No. 12 / 590,643, filed November 12, 2009, which is incorporated herein by reference. technical field [0003] Some embodiments of the invention relate to tools for designing a system on a target device. More specifically, some embodiments of the invention relate to methods and apparatus for hardware assisted placement. Background technique [0004] Electronic designs for large systems can include millions of gates and millions of bits of embedded memory. Of the tasks required to manage and optimize an electronic design on a target device, synthesis, place and route with available resources can be the most challenging and time consuming. The complexity of large systems often requires the use of computer-aided design (CAD) or electronic design automation (EDA) tools to manage and optimize designs. CAD tools perform the time-consuming tasks of synthesis...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
CPCG06F17/5072G06F30/34G06F30/392G06F30/347
Inventor J·C·范迪肯
Owner ALTERA CORP
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