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Serial bus memory, serial bus transmission system and method

A technology of serial bus and serial bus interface, applied in the fields of serial bus memory and serial bus transmission system, can solve the problem of inability to judge the cost of serial communication system of slave devices in series, and achieve the effect of reducing cost

Active Publication Date: 2012-07-25
SHENZHEN MOONCELL ELECTRIC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0016] The technical problem to be solved by the present invention is that the address of each slave device must be set for the traditional serial bus used in the prior art, and the serial sequence of each slave device cannot be judged and the cost of the serial communication system can be reduced. Serial bus memory, serial bus transmission system and method

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  • Serial bus memory, serial bus transmission system and method
  • Serial bus memory, serial bus transmission system and method

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Embodiment Construction

[0042] The core idea of ​​the present invention is to connect a plurality of slave devices in series through a serial bus composed of two signal lines, one is a clock signal line, and the other is a data signal line; each slave device or the serial bus memory included therein Monitor the control command on the serial bus, enter the service state after completing the data read and write operation of the local serial bus memory, in the service state, according to the needs of the detected control command The device or the serial bus memory included in it provides transparent left or right transfer services, so as to realize the data read and write functions between the master device and each slave device or the serial bus memory included in it. In the technical solution of the present invention , there is no need to set the communication address for each slave device. The "serial sequence" of each slave device is equivalent to the communication address, that is, the master device...

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Abstract

The invention relates to the serial bus technical field for communication and discloses a serial bus memory. The serial bus memory comprises a serial bus interface and a memory which are electrically connected in sequence, and the serial bus memory also comprises a serial processing logical circuit electrically connected with the serial bus interface and the memory respectively, wherein the serial bus interface comprises a first serial interface and a second serial interface. The invention also discloses a serial bus transmission system and a method; according to the serial bus memory, the serial bus transmission system and the method, the address of the slave unit is avoided to set; the serial connection order of a plurality of slave units can be judged; and the serial connection order can automatically become the address of the slave unit.

Description

technical field [0001] The present invention relates to the technical field of serial bus used for communication, and more specifically, relates to a serial bus memory, a serial bus transmission system and a method. Background technique [0002] In a communication system that uses a serial bus to form a network, it generally includes a master device and multiple slave devices. When the master device communicates with multiple slave devices, each slave device must set a unique address code to ensure that the master device can identify a specific slave device. Generally, the slave devices include readable and writable memories (such as PROM / ROM), and the master device needs to perform data read and write operations on the memories of multiple slave devices. The control bus of the non-volatile memory chip is divided into two categories: serial and parallel. Since the control lines used in the parallel bus are more than 8, this kind of parallel bus is rarely used in some applic...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/16
Inventor 胡家同
Owner SHENZHEN MOONCELL ELECTRIC
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