FIFO memory and storage controlling device

Abstract

The invention discloses an FIFO storage controlling device comprising a write shunting controller, two read-write controllers, and a read interflow controller. The invention also discloses a FIFO memory comprising the FIFO storage controlling device and at least two sheets of SRAM. The FIFO memory and the storage controlling device are advantaged by employing the single-port SRAMs as memory cells to realize full speed FIFO memory, enabling the FIFO memory to work in full speed when the single-port SRAMs are being used, enabling the single-port SRAMs with same depth and function to realize full speed FIFO storage function, and effectively reducing the full speed FIFO storage area; enabling the single-port SRAMs to be applied in the full speed FIFO memory, so that the area and scale of a large scale integrated circuit are reduced with strong practicality, and the cost of FIFO memory is also reduced because the single-port SRAMs are applied in the full speed FIFO memory.

Description

technical field [0001] The invention relates to the technical field of memory, in particular to a first-in-first-out (FIFO) memory and a storage control device, belonging to the technical field of storage. Background technique [0002] FIFO (First In First Out) memory is a first-in-first-out cache device, which can pre-write the obtained data into the FIFO memory, and then take it out in the original order and provide it to the device that needs the data. [0003] An important indicator of the FIFO memory is the maximum number of data that the FIFO memory can store, which is called the depth. For the FIFO memory with a smaller depth, its storage unit uses a register, and for a FIFO memory with a larger depth, its storage unit uses SRAM ( Static Random Access Memory, static random access memory). [0004] FIFO memory, including full-speed FIFO memory, half-speed or decelerable FIFO memory. [0005] In a full-speed FIFO memory, the read port or the write port can operate one...

AI Technical Summary

Problems solved by technology

[0006] In the prior art, for full-speed FIFO memory, dual-port SRAM is commonly used as the memory unit of full-speed FIFO memory, but the area of ​​dual-port SRAM is larger than that of single-port SRAM, which is not conducive to reducing the area of ​​integrated circuits in practical applications, and the practicability is not strong

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