Semiconductor device and manufacturing method thereof

A technology of semiconductors and devices, which is applied in the field of semiconductor devices and their manufacturing, can solve problems such as insufficiency, and achieve the effects of low on-resistance, reduced on-resistance, and high withstand voltage

Inactive Publication Date: 2012-10-31
RENESAS ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Even using the bidirectional switching device disclosed in Japanese Unexamined Patent Publication No. 2009-295684, as a solution to the trade-off relationship, it is not enough

Method used

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0081] First, a semiconductor device in the state of a chip will be described in this embodiment.

[0082] see figure 1 , the semiconductor chip CHP in this embodiment has an input circuit, an output circuit, and a CMOS logic circuit. They are arranged over the main surface of the semiconductor substrate SUB.

[0083]The input circuit is a circuit for driving a CMOS (Complementary Metal Oxide Semiconductor) logic circuit and an output circuit. CMOS logic circuits are circuits used to calculate signals as they are passed from input circuits to drive output circuits, and so on. An output circuit is a circuit for outputting a signal to a load to which it is coupled (eg, a pixel of a plasma display). That is, the terminals of the output circuit are electrically coupled to the load. For example, if figure 1 The arrangement shown constitutes elements such that a collection of CMOS logic circuits is arranged above the main surface of the semiconductor substrate SUB, output cir...

no. 2 example

[0161] Compared with the first embodiment, this embodiment differs in the conductivity type of the epitaxial layer. will refer to Figure 31 to describe this embodiment.

[0162] with according to Figure 5 Compared with the high-voltage MOS transistor for bidirectional switching shown in the first embodiment, Figure 31 The high-voltage MOS transistor for bidirectional switching shown in is only different in that the conductivity type of its epitaxial layer NEP is n-type. That is, in this embodiment, both the epitaxial layer NEP and the well region HVNW contain n-type impurities, and the conductivity types of the epitaxial layer NEP (first impurity layer) and the well region HVNW (second impurity layer) are the same (both Contains n-type impurities).

[0163] Given the above, when combined with Figure 5 When compared with the configuration of the first embodiment shown, the Figure 31 The high voltage MOS transistor configurations of this embodiment shown in the differ...

no. 3 example

[0168] Compared with the first embodiment, this embodiment is different in the conductivity type and the like of each constituent element. will refer to Figure 32 to Figure 34 to describe this embodiment.

[0169] Figure 32 High-voltage MOS transistors for bi-directional switches and based on Figure 5 The high voltage transistor of the bidirectional switch of the first embodiment shown is different in that the first impurity layer (epitaxial layer NEP), the second impurity layer (high voltage well region HVPW), the third impurity layer OFP, the fourth impurity layer (diffusion layer NW), the conductivity types of the fifth impurity layer OFP2 and the contact diffusion layer NWC. That is, the high voltage well region HVPW has p-type impurities, and the diffusion layers OFP and OFP2 have n-type impurities. Preferably, the n-type impurity is, for example, the same phosphorus (P) impurity as in the first embodiment, and the p-type impurity is, for example, the same boron (B...

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Abstract

The high voltage transistor includes a first impurity layer, a second impurity layer formed inside the first impurity layer, so as to put the second impurity layer between them, a pair of third impurity layers and fourth impurity layers formed inside the first impurity layer, a fifth impurity layer formed from the uppermost surface of the first impurity layer to the inside of the first impurity layer so as to protrude along the main surface in the direction where the second impurity layer is disposed, and a conductive layer formed above the uppermost surface of the second impurity layer. The concentration of the impurity in the fourth impurity layer is higher than the concentration of the impurity in the third and the fifth impurity layers, and the concentration of the impurity in the fifth impurity layer is higher than the concentration of the impurity in the third impurity layer.

Description

[0001] Cross References to Related Applications [0002] The disclosure of Japanese Patent Application No. 2011-099386 filed on Apr. 27, 2011 including specification, drawings and abstract is hereby incorporated by reference in its entirety. technical field [0003] The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly, the present invention relates to a semiconductor device having a so-called high withstand voltage structure and a manufacturing method thereof. Background technique [0004] In recent years, as various electronic equipments have been reduced in weight and size, semiconductor devices incorporated in electronic equipments have been increasingly improved. For example, in a semiconductor chip that applies current to pixels of a plasma display, attempts have been made to reduce the area occupied by the semiconductor chip by mixing low-voltage drive transistors driven at low voltage and high-voltage drive...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/088H01L21/82H01L29/36
CPCH01L21/823814H01L21/82385H01L21/823871H01L21/823456H01L21/823418H01L21/823892H01L21/823475H01L21/823493H01L27/0207H01L29/41758H01L29/42364H01L29/4238H01L29/66689H01L29/7816H01L29/7833H01L29/7835H01L29/7836H01L29/0692H01L29/0847H01L29/1033H01L29/1083H01L29/1087H01L29/1095H01L29/66568H01L29/66575H01L29/1045H01L29/36
Inventor 德光成太上西明夫
Owner RENESAS ELECTRONICS CORP
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