Bit line structure and manufacturing method thereof
A manufacturing method and bit line technology, applied in semiconductor/solid-state device manufacturing, electrical components, transistors, etc., can solve problems such as unfavorable semiconductor process development, and achieve the effect of reducing parasitic capacitance and reducing spacing
Active Publication Date: 2014-07-30
WINBOND ELECTRONICS CORP
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- Application Information
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Problems solved by technology
Therefore, in order to reduce the parasitic capacitance, a larger interval is required between the bit line and the bit line, or a thicker insulating layer 110 is used to isolate the bit line 102a and the semiconductor substrate 100, which is not conducive to the development of more advanced semiconductor processes.
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[0029] In order to make the above and other objects, features, and advantages of the present invention more comprehensible, preferred embodiments are listed below and described in detail in conjunction with the accompanying drawings.
[0030] See figure 2 , which is a top view of a DRAM provided by an embodiment of the present invention. In a semiconductor substrate 200, a plurality of trenches for bit lines 202 and a plurality of trenches for word lines 204 are included, which are substantially vertically and alternately arranged. The groove formed by each bit line 202 contains a bit line 202, and the groove formed by each word line contains a word line 204, wherein the word line 204 is divided into two left and right (such as figure 2 shown). The active region 206 of this transistor is an unrecessed region, thus forming a pillar. Each bit line 202 and word line 204 is electrically connected to the active area of the transistor, and provides input / output signals throug...
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The invention discloses a bit line structure and a manufacturing method thereof, which includes: a substrate having a bottle-shaped groove therein, wherein the bottle-shaped groove includes a first groove and an enlarged second groove, And the first groove and the second groove each have a first side wall and a second side wall facing each other, and the first side walls of the first and second grooves are located in the same part of the bottle-shaped groove. side; an insulating layer located in the second trench, having a first opening facing the first trench, and forming a second opening with the second trench, the second opening being connected to the first opening and exposing the second a top portion of the first side wall of the trench; a conductive material located in at least a portion of the substrate adjacent to the second opening; and a conductor located in the first opening and in direct contact with the conductive material. According to the bit line structure and the manufacturing method provided by the embodiments of the present invention, the parasitic capacitance between the bit lines can be effectively reduced without increasing the minimum distance between the bit lines.
Description
technical field [0001] The present invention relates to semiconductor devices, and more particularly to a dynamic random access memory and a manufacturing method thereof. Background technique [0002] At present, the dynamic random access memory (DRAM) industry has developed an embedded bit line structure, and the bit line is fabricated in a substrate to reduce the size of the memory. At present, the industry has also introduced the structure of vertical transistors. In a vertical transistor structure, the active region of the transistor is formed in a single crystal semiconductor substrate. A storage capacitor is formed on top of the active area. The bit line and the word line are buried in the semiconductor substrate, and each bit line and word line are electrically connected with the active area of the transistor, and control the change of charge in the storage capacitor through the bit line and the word line. [0003] Currently, there are various methods of forming ...
Claims
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IPC IPC(8): H01L21/8242H01L27/108H10B12/00
Inventor 郭泽绵
Owner WINBOND ELECTRONICS CORP