Accessing storing controller capable of supporting data descrambling and descrambling method for accessing storing controller
A controller and memory access technology, applied in the direction of electrical digital data processing, instruments, etc., can solve the problems of inconvenient large-scale data processing, increase the difficulty of control, simple and other problems, and achieve the effect of improving data processing capabilities
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Embodiment 1
[0044] Such as figure 1 As shown, the memory access controller is provided with three descrambling channels and an arbiter, and the arbiter is located after the three descrambling channels. Wherein; the three descrambling channels descramble different types of source data according to the control instructions of the memory access controller; the arbitrator judges the data obtained after descrambling to output the corresponding data .
[0045] The execution process is: when the state controller in the memory access controller issues a data transmission start command, it will automatically obtain the valid data to be descrambled from the memory, and transmit it to the three descrambling channels, and then in the descrambling channel according to the DMA The DMA information stored in the register set and the control information stored in the data descrambling register set perform descrambling processing on the effective data to be descrambled. After the valid data is descramble...
Embodiment 2
[0049] Such as figure 2As shown, the memory access controller is provided with three descrambling channels, a direct channel and three arbitrators, wherein; the three descrambling channels respond to different types of source data according to the control instructions of the memory access controller Descrambling; direct channel, transporting non-descrambling data; the three arbiters include a first arbiter, a second arbiter and a third arbiter, wherein;
[0050] The first arbiter judges the source data according to the control instruction of the memory access controller, so as to distinguish descrambled data and non-descrambled data;
[0051] The second arbiter judges the data to be descrambled according to the control instruction of the memory access controller, so as to distinguish different types of data and allocate each descrambling channel for descrambling;
[0052] The third arbiter judges the descrambled data and non-descrambled data according to the control instruct...
Embodiment 3
[0062] Embodiment 3: For the scrambling code generator polynomial x 15 +x 14 +1, the specific production process is: during the DMA transfer and data descrambling process at the same time, the scrambling code sequence can be as follows image 3 The circular shift register shown is produced.
[0063] 1. Initialize the control word, including the initial value (X) of the 16-bit register as shown in the figure, the calculation length of the scrambling code preparation sequence, etc.
[0064] 2. Start DMA to obtain data from the data source,
[0065] 3. Use the generated scrambling code sequence to descramble the data,
[0066] 4. The processed data is stored in the storage unit.
[0067] The scrambling code is generated as follows:
[0068] X[1]<=X[0];
[0069] X[2]<=X[1];
[0070] …
[0071] X[14]<=X[13];
[0072] X[0]<=X[14]^X[13].
[0073] Each clock cycle generates a scrambling code, that is, the value of X[13]^X[14].
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