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Many-core processor and its method of inter-core communication, master core and slave core

A technology of many-core processors and inter-core communication, applied in the fields of many-core processors and their inter-core communication, master core and slave core, it can solve problems such as message loss, master core unable to respond to slave core requests, etc.

Active Publication Date: 2015-10-07
JIANGNAN INST OF COMPUTING TECH
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0007] The problem solved by the technical solution of the present invention is that the many-core processors in the prior art cause message loss when the slave core generates a large number of transaction requests, and the master core cannot respond to the request from the slave core.

Method used

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  • Many-core processor and its method of inter-core communication, master core and slave core

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Embodiment Construction

[0031] In order to make the above-mentioned purpose, features and advantages of the technical solution of the present invention more obvious and understandable, the specific implementation manners of the present invention will be described in detail below in conjunction with the accompanying drawings and examples.

[0032]In the prior art, there is no method for inter-core communication of many-core processors, and the inter-core communication mechanism of multi-core processors is not suitable for application scenarios of many-core processors. However, in many-core processors, since a large number of slave-core transaction requests need to be processed by the master core, an inter-core communication method is needed to ensure the efficient and stable operation of the system and prevent the loss of messages sent by the slave cores.

[0033] Please refer to figure 1 The technical solution of the present invention provides a method for inter-core communication of many-core proces...

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Abstract

Provided is a many-core processor and an inter-core communication method thereof, a main core and an auxiliary core. The inter-core communication method of the many-core processor comprises that the auxiliary core fills information in a data area of a corresponding sharing interactive area, and then the main core is informed by utilizing inter-core interrupt; the main core applies for sharing a buffer memory space after receiving the inter-core interrupt sent by the auxiliary core, if the application of sharing the buffer memory space fails, and then the main core applies for a reserved buffer memory space corresponding to the auxiliary core; the main core gets message from the sharing interactive area and stores the message in an applied buffer memory space, and then the main core releases the sharing interactive area; and the main core processes the message and releases the applied buffer memory space after processing the message. The many-core processor and the inter-core communication method thereof do not cause message loss and provide a reliable inter-core communication mechanism.

Description

technical field [0001] The invention relates to the field of processors, in particular to a many-core processor and a communication method between cores, a master core and a slave core. Background technique [0002] With the development of semiconductor technology, traditional single-core processors have exposed many limitations. In order to reduce power consumption and heat dissipation while further improving processor performance, architecture designers have proposed multi-core processors. ) and many-core processors. Multi-core processors can be divided into two types: homogeneous multi-core processors and heterogeneous multi-core processors. The processor cores in the homogeneous multi-core processor are of the same type, and they are in an equal position in the multi-core processor; the heterogeneous multi-core processor contains different types of processor cores, and the different types of processor cores are in the multi-core processor. Play different roles. Many-c...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F15/167
Inventor 许国春黄高阳陈斐殷红武
Owner JIANGNAN INST OF COMPUTING TECH
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