Shift register, grid line integrated drive circuit, array substrate and display

A shift register and gate technology, which is applied in the field of array substrates and displays, gate line integrated drive circuits, and shift registers, can solve the problems of signal output terminal potential increase, signal output terminal voltage decrease, and output signal noise. , to achieve the effect of reducing noise interference

Active Publication Date: 2013-02-13
BEIJING BOE OPTOELECTRONCIS TECH CO LTD
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Problems solved by technology

[0004] It can be seen that the signal input terminal (INPUT), the reset signal terminal (RESETIN) and the signal output terminal (OUTPUT) are all low level, when the clock signal terminal (CLKIN) is high level, the parasitic capacitance Cgd1 of T101 is coupled To the PU node, the drain current of T101 increases, so that the potential of the signal output terminal (OUTPUT) rises, an

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  • Shift register, grid line integrated drive circuit, array substrate and display
  • Shift register, grid line integrated drive circuit, array substrate and display
  • Shift register, grid line integrated drive circuit, array substrate and display

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[0023] In the following, specific implementations of the shift register, the gate line integrated driving circuit, the array substrate, and the display provided by the embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0024] An embodiment of the present invention provides a shift register, such as image 3 As shown, it includes: a first thin film transistor TFT M1, the gate and drain of which are connected to the signal input INPUT terminal, and the source is connected to the pull-up PU node; the second TFT M2, the gate of which is connected to the reset signal RESET terminal, and the drain The pole is connected to the pull-up PU node, the source is connected to the low-level signal VSS terminal; the gate of the third TFT M3 is connected to the pull-up PU node, the drain is connected to the clock signal terminal, and the source is connected to the signal output OUTPUT terminal The fourth TFT M4, its gate is connected to...

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Abstract

The invention discloses a shift register, a grid line integrated drive circuit, an array substrate and a display. Two electronic switch modules are additionally arranged in the conventional shift register and are arranged between a drop-down node, a low level signal end and a pull-up node, and between the drop-down node, the low level signal and a signal output end respectively; the two electronic switch modules are started when the shift register is in the non-work time and the drop-down node is in low level and are used for reducing the noise of discharging the pull-up node and the signal output end respectively, so that the noise interference of the shift register in the non-working time is effectively reduced.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a shift register, a gate line integrated drive circuit, an array substrate and a display. Background technique [0002] In a thin film transistor liquid crystal display (TFT-LCD, Thin Film Transistor Liquid Crystal Display), usually a gate driving device provides a gate driving signal to the gate of each thin film transistor (TFT, Thin Film Transistor) in the pixel area. The gate drive device can be formed on the array substrate of the liquid crystal display through an array process. This integration process not only saves costs, but also achieves a symmetrical and beautiful design on both sides of the liquid crystal panel (Panel). At the same time, it also eliminates the need for gate integration. Circuit (IC, Integrated Circuit) bonding (Bonding) area and fan-out (Fan-out) wiring space, so that narrow border design can be realized; moreover, this integration process can also s...

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Application Information

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IPC IPC(8): G09G3/20G09G3/36G11C19/28G09F9/35
CPCG09G3/3677G11C19/28G09G2310/0286G09G3/3648
Inventor 陈希
Owner BEIJING BOE OPTOELECTRONCIS TECH CO LTD
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