Operation node plate and layout method of operation node plate
A technology of computing nodes and layout methods, applied in the field of computing, can solve the problems of large installation height, unfavorable large-scale system assembly and heat dissipation, and hot spot concentration.
Active Publication Date: 2013-04-03
JIANGNAN INST OF COMPUTING TECH
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Problems solved by technology
This method belongs to the technical means of the processor design stage, which can more effectively reduce the power supply voltage drop and path loss, and improve the response efficiency of the power supply. However, it cannot solve the problems of too concentrated hot spots and too large installation height, which is not conducive to the development of large-scale systems. Assembly and cooling
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[0024] In order to make the content of the present invention clearer and easier to understand, the content of the present invention will be described in detail below in conjunction with specific embodiments and accompanying drawings.
[0025] figure 1 A layout structure of a high-performance computing node board according to an embodiment of the present invention is schematically shown.
[0026] Specifically, as figure 1 As shown, two processors (the first processor A and the second processor B) are integrated on the high-performance computing node board according to the embodiment of the present invention, and the models of the first processor A and the second processor B are the same and are independent of each other; moreover, no other processors are integrated on the computing node board.
[0027] Among them, the first processor A and the second processor B control power supply through multi-channel power supply modules and supporting power supply control logic chips res...
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The invention provides an operation node plate and a layout method of the operation node plate. A first processor and a second processor are integrated on a high-performance operation node plate; the first processor and the second processor are of consistent models, and are independent of each other; other processors are not integrated on the operation node plate; power supply control is performed on the first processor and the second processor through multiple paths of power supply modules and a matched power supply respectively; the first processor and the second processor are provided with multiple paths storages respectively for performing independent data access operation; the first processor and the second processor are provided with common logic circuits; the first processor and the second processor are arranged in a staggered way, and are arranged together with any other high devices or hot devices in a staggered way; multiple paths of controlled power supply modules of the first processor are arranged in a dispersed way around the first processor; and multiple paths of controlled power supply modules of the second processor are arranged in a dispersed way around the second processor.
Description
technical field [0001] The present invention relates to the technical field of computing, and more specifically, the present invention relates to a layout structure of a high-performance computing node board and a corresponding computing node board layout method. Background technique [0002] In the field of high-performance computing, the computing node component is the most basic unit of high-performance computers, which undertakes important functions such as logic operations, control processing, storage access, and interconnection communication. Its design is always the focus of system research and development. With the rapid development of high-performance computing technology, especially with the expansion of the integrated circuit scale of high-performance processors, the increase in the number of computing cores, and the continuous increase in operating frequency, the power consumption of processors has increased significantly while the chip package size has expanded. ...
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IPC IPC(8): G06F15/76
Inventor 王彦辉丁亚军刘耀贾福桢郑浩胡晋
Owner JIANGNAN INST OF COMPUTING TECH