Pull-up resistance circuit for preventing reverse current filling

Abstract

The invention discloses a pull-up resistance circuit for preventing reverse current filling, which is used for protecting a public signal end from being influenced by drain current of a connected power supply. The pull-up resistance circuit comprises a pull-up resistance module and a control signal generating module, wherein the pull-up resistance module is connected in series between the public signal end and the power supply; the control signal generating module is electrically connected with the pull-up resistance module and the public signal end; when the power supply is in charge, the control signal generating module is used for controlling the pull-up resistance module to be connected with the power supply; and when the power supply is out of charge, the control signal generating module is used for controlling the pull-up resistance module to be disconnected from the power supply. Due to the adoption of the pull-up resistance circuit for preventing reverse current filling, the public signal end is protected from being influenced by the drain current of the connected power supply when a local equipment power supply does not work, and transmission of information with other equipment can be realized effectively when the local equipment power supply works.

Description

technical field [0001] The invention relates to a pull-up resistor circuit, in particular to a pull-up resistor circuit capable of preventing backfilling. Background technique [0002] With the rapid development of the electronic information industry, the speed of data transmission is increasing day by day, and various interface protocols between chips and between devices emerge in an endless stream. Some of these protocols require the signal terminals of multiple interfaces to be directly connected through a connection, so that when a certain interface sends out a signal, all interfaces can detect the change of the signal level on the connection, so as to transmit information. [0003] At present, a commonly used interface circuit structure such as figure 1 shown in figure 1 In the circuit shown, since the local power supply VCC of each device may be powered independently, it is assumed that the local power supply VCC0 of device 0 has no power, and the local power supply ...

AI Technical Summary

Problems solved by technology

[0003] At present, a commonly used interface circuit structure such as figure 1 shown in figure 1 In the circuit shown, since the local power supply VCC of each device may be powered independently, it is assumed that the local power supply VCC0 of device 0 has no power, and the local power supply VCC of other devices is normally powered. When the local power supply VCC of other devices tries to pass through their respective pull-up resistors When a logic high level signal is sent, since VCC0 has no power, the pull-up resistor R0 in the basic circuit inside device 0 becomes a pull-down resistor at this time, and R0 will cause the logic high level signal to decrease, and the device without power will The greater the number, the lower the actual level of the logic high level signal, which will cause the signal logic error on the connection detected by all interfaces

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