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Method and device for reducing bit error rate in cdma communication system

A communication system, bit error rate technology

Active Publication Date: 2015-08-12
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The present invention provides a method and device for reducing the bit error rate in a CDMA communication system, which is used to solve the problem of high bit error rate at the receiving end caused by wrong sampling in the CDMA synchronization algorithm in the prior art

Method used

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  • Method and device for reducing bit error rate in cdma communication system
  • Method and device for reducing bit error rate in cdma communication system
  • Method and device for reducing bit error rate in cdma communication system

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Embodiment 1

[0030] A preferred embodiment of the present invention provides a method for reducing the bit error rate in a CDMA communication system, image 3 A preferred flowchart showing the method, as image 3 As shown, the method includes the following steps:

[0031] S302, acquire the sampling sequence I of the co-directional component signal I sent by the signal sending end in , and the sample sequence Q of the quadrature component signal Q in ;

[0032] S304, according to the number of samples Ns of the chip, the acquired sampling sequence I in and the sampling sequence Q in It is divided into different groups, and the signals of each group are summed and averaged to determine the corresponding signal group. Each signal group contains the signal after the summed and averaged operation. Among them, the sampling sequence I in The signal group determined after the summing and averaging operation is W I , the sampling sequence Q in The signal group determined after the summing an...

Embodiment 2

[0042] Based on the method for reducing the bit error rate of the CDMA communication system provided in the above-mentioned embodiment 1, this preferred embodiment provides a device for reducing the bit error rate of the CDMA communication system, Figure 5 A preferred flow chart for the device, such as Figure 5 As shown, the device includes: an acquisition unit 502, configured to acquire the sampling sequence I of the co-directional component signal I sent by the signal transmitting end in , and the sample sequence Q of the quadrature component signal Q in ; The summing and averaging unit 504 is used to obtain the sampling sequence I according to the number of samples Ns of the chip in and the sampling sequence Q in It is divided into different groups, and the signals of each group are summed and averaged to determine the corresponding signal group. Each signal group contains the signal after the summed and averaged operation. Among them, the sampling sequence I in The si...

Embodiment 3

[0051] Based on the method for reducing the bit error rate of the CDMA communication system provided by the above-mentioned embodiment 1 and the device for reducing the bit error rate of the CDMA communication system provided by the embodiment 2, this preferred embodiment provides another method for reducing the bit error rate of the CDMA communication system method, Figure 8 Shows the logical schematic diagram of the hardware realization of the method, in Figure 8 Among them, Tc is the chip delay time (chip period), and Ns is the sampling frequency of the chip. In the realization process of this method, mainly in I in , Q in After the two input signals, several groups of delayers and matched filter banks MF are added respectively. After the filters, the precise synchronization of data is realized through the maximum amplitude selector, which eliminates serious intersymbol interference caused by wrong sampling and reduces the traditional method. High bit error rate due to...

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Abstract

Disclosed are a method and device for reducing the error rate in a CDMA communication system. The method comprises: obtaining a sampling sequence Iin of equidirectional component signals I and a sampling sequence Qin of quadrature component signals Q, which are sent by a signal sending end; according to the number of times chips are sampled Ns, dividing the obtained sampling sequence Iin and sampling sequence Qin into different groups, and performing a summation averaging operation on the signals of each group to determine corresponding signal groups, wherein the determined signal group of the sampling sequence Iin after the summation averaging operation is WI, and the determined signal group of the sampling sequence Qin after the summation averaging operation is WQ; grouping the signals in the signal group WI and the signal group WQ to determine that the sampling sequences of the summation averaging operation belong to the signals of the same chip, and outputting the determined signals. The present invention solves the problem in the prior art of a high error rate of a receiving end due to the fact that a wrong sampling situation exists in a CDMA synchronization algorithm.

Description

technical field [0001] The invention relates to the communication field, in particular to a method and a device for reducing the bit error rate in a CDMA communication system. Background technique [0002] In the CDMA (Code Division Multiple Access, Code Division Multiple Access) communication system, the synchronization of data transmission is very important. If the synchronization of data transmission between the sender and receiver is not solved, the communication equipment will not be able to communicate normally. There are many synchronization methods in the traditional CDMA system. For example, in the synchronization acquisition phase, the sending end first sends a synchronization sequence to the receiving end. After receiving the synchronization sequence from the sending end, the receiving end establishes the synchronization between the sending and receiving ends, and then switches to the data state for data transmission. . This synchronization method uses different ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04B1/7075
CPCH04B1/7075H04W56/001H04L1/0078H04L27/364
Inventor 陈忠平
Owner ZTE CORP
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