Method of achieving high-definition transmission of videos
A video and high-definition technology, applied in digital video signal modification, TV, electrical components, etc., can solve problems such as poor video quality and poor real-time performance, and achieve the effects of reducing the amount of calculation, improving efficiency, and ensuring quality
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[0041] [Example 1]
[0042] Reference figure 1 , figure 2 with image 3 , Where the CPU is Intel Core2Q9400, the main frequency is 2.66GHz, and the memory is 3G; the GPU is GeForce GT425M (video memory bit width 128bit, core frequency 1120MHz, video memory frequency 800MHz, video memory bandwidth 25.6GB / s). In the double-buffer multi-threaded operation, the buffer block structure is defined as follows:
[0043]
[0044] Among them, link is the connection pointer of the buffer block in the buffer; data is the pointer to the current buffer block.
[0045] use figure 2 The level 1 shown is decoded based on the H.264 CPU+GPU parallel decoding architecture.
[0046] Under the above-mentioned conditions, a 720x576 video sequence was selected for testing, 300 frames were extracted, and 800 times were repeated, and the average time consumption of each frame of MC was calculated. Compared with the traditional CPU algorithm, the algorithm adopted by the present invention enables the overall ...
Example Embodiment
[0047] [Example 2]
[0048] Reference figure 1 , figure 2 with Figure 4 , CPU is Intel Core2Duo CUP E8400, main frequency is 3.0GHz, memory is 1.9G; GPU is GeForce GT425M (video memory bit width 128bit, core frequency 1120MHz, video memory frequency 800MHz, video memory bandwidth 25.6GB / s). The definition of the buffer block structure in the double-buffer multi-threaded operation is the same as the real-time example 1. use image 3 The level 4 shown is decoded based on the H.264 CPU+GPU parallel decoding architecture. Under the above conditions, a 1280x720 video sequence was selected for testing, 200 frames were extracted, and repeated execution was performed 1000 times, and the average time consumption was counted. Compared with the traditional CPU algorithm, the algorithm of the present invention enables the overall acceleration ratio to reach 8.5 times; and the video image quality is clear, which effectively realizes the high-definition and real-time transmission of the vid...
Example Embodiment
[0049] [Example 3]
[0050] Reference figure 1 , figure 2 with Figure 5 , CPU is Intel Core2Duo CUP E8400, main frequency is 3.0GHz, memory is 1.9G; GPU is NVIDIA GeForce GTX460 (video memory bit width 256bit, core frequency 1350MHz, video memory frequency 3600MHz, video memory bandwidth 115.2GB / s). The definition of the buffer block structure in the double-buffer multi-thread operation is the same as [Embodiment 1]. use Figure 5 The level 3 shown is decoded based on the H.264 CPU+GPU parallel decoding architecture. Under the above conditions, a video sequence with a resolution of 352x288 with low resolution and smooth motion and a video sequence with a resolution of 720x576 with a high resolution and very violent motion were selected for testing. Each video sequence was extracted 200 The frame was executed repeatedly 1000 times, and its average time was counted. Compared with the traditional CPU algorithm, the algorithm of the present invention makes the overall speed-up ...
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