Phase-locked loop signal source with emitter coupled logic (ECL) phase discriminator and generation method thereof

Abstract

The invention relates to the field of testing, in particular to a phase-locked loop signal source with an emitter coupled logic (ECL) phase discriminator and a generation method thereof. The signal source comprises a reference clock unit for providing reference clock signals and the ECL phase discriminator, wherein the ECL phase discriminator is used for receiving reference clock signals of a positive emitter coupled logic (PECL) level transmitted by a first level conversion unit and variable output signals undergone frequency division processing and transmitted by a second level conversion unit and transmitting PECL level signals containing phase difference information of two paths of signals to a third level conversion unit; the third level conversion unit converts PECL level comprising phase difference information into level signals in accordance with using of an output unit; and the output unit outputs variable frequency signals according to phase difference information. By means of an embodiment of the phase-locked loop signal source with the ECL phase discriminator, the phase discrimination frequency of the signal source can be improved through the ECL phase discriminator and the level converter working in coordination with the ECL phase discriminator, and phase noises of the signal source can be further reduced.

Description

Technical field [0001] The invention relates to the field of testing, in particular to a phase-locked loop signal source with an ECL phase detector and a generating method thereof. Background technique [0002] Phase-locking technology is a commonly used method to accurately determine the frequency, and its applications are becoming more and more extensive, and the requirements for performance are getting higher and higher. As the main part of frequency synthesis, the phase noise of the phase-locked loop has also become a very important indicator. In the transmitting device, it will determine the spectral purity of the output signal; in the receiving device, it is a factor that affects the receiving sensitivity. [0003] Within the loop bandwidth of the phase-locked loop, the phase noise of the reference clock is a major factor affecting the phase noise of the output signal of the phase-locked loop. When the phase noise of the reference does not affect the noise floor, the output p...

AI Technical Summary

Problems solved by technology

However, in the prior art, there is no effective solution to provide a high phase detection frequency to reduce signal phase noise

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