100results about How to "Reduce power dissipation" patented technology

A method and apparatus for efficiently storing multiple data types in a computer's register or data file. A single data file can store data with a variety of sizes and number formats, including integers, fractions, and mixed numbers. The register file is partitioned into fields, such that only the relevant portions of the register file are read or written.

The present invention relates to a DC-AC inverter comprising a plurality of H-bridge converters (101, 102, etc.), each being arranged to be integrated with a respective photovoltaic element (108, 109, etc.) and to be supplied with a DC voltage from the photovoltaic element, the H-bridge converters further being cascaded to produce a multilevel voltage output (Vout). The DC-AC inverter further comprises switch control circuitry connected to each one of the plurality of H-bridge converters to control switching thereof for producing the multilevel voltage output, and a central adaptation unit connected to the cascaded H-bridge converter for adapting the multilevel voltage output such that an AC grid voltage is output from the DC-AC inverter.

The invention relates to a power electronic converter (20a) for use in high voltage direct current power transmission and reactive power compensation which comprises at least one converter limb (22) including first and second DC terminals (24a, 24b) for connection in use to a DC network (26), the or each converter limb (22) including at least one first converter block (32) and at least one second converter block (34) connected between the first and second DC terminals (24a, 24b); the or each first converter block (32) including a plurality of line-commutated thyristors (36) and at least one first AC terminal (28) for connection in use to an AC network (30), the or each second converter block (34) including at least one auxiliary converter including a plurality of self-commutated switching elements; wherein the self-commutated switching elements are controllable in use to inject a voltage to modify a DC voltage presented to the DC side of the converter limb (22) and/or modify an AC voltage and an AC current on the AC side of the power electronic converter (20a).

The invention discloses a power supply device for a DUT in an integrated circuit test system. A PC host computer sets a preset output value of the system according to the needs of the integrated circuit test system, and sends the preset output value to a controller MCU; the controller MCU controls a chopper circuit to output a corresponding voltage value for a power amplifier according to the preset output value of the system, and the integrated circuit test system is thus controlled to operate. When the integrated circuit test system is controlled to operate, a voltage/current sampling circuit collects voltage and current values, the values are fed back to the controller MCU, the controller MCU processes the deviation value of the preset output value and the sample value through a built-in feedback control algorithm, the output voltage of a BUCK/BOOST chopper circuit is further controlled through the deviation value, and thus, the output power precision is controlled and adjusted, thepower dissipation of the power amplifier is reduced, and the load driving capability of the power amplifier is improved.

The invention relates to a method for realizing equalizing charge for a serial lithium ion battery pack. The method for realizing the equalizing charge for the serial lithium ion battery pack includes that firstly, building a physical model of a single lithium ion battery and determining each parameter of the single lithium ion battery according to lithium ion battery charging and discharging characteristics; secondly, according to the physical model of the single battery, using an ampere-hour method and an extended Kalman filtering method together to calculate the surplus capacity and terminal voltage of the single battery at each moment in the process of constant current charging; thirdly, when the terminal voltage of each single battery arrives at a discrete state in the constant current charging for the battery pack, calculating the surplus capacity and the surplus capacity difference thereof according to the terminal voltage at the moment; finally, using small current to regulate the whole surplus capacity of the battery pack till the surplus capacity of each single battery is equalized. Compared with a traditional equalizing charging method for the serial lithium ion battery pack, the method for realizing the equalizing charge for the serial lithium ion battery pack uses the small current to carry out equalizing charge on the battery pack in the whole process, the disadvantage of high apparatus power consumption of the traditional method due to only using large current to perform the equalizing charge at the final charging stage is overcame, and the method is reliable and easy to perform.

This invention is primarily a circuit structure of self-mixing receiver, and the methodology of circuit structure is described as follows. The first stage is a high input impedance voltage amplifier utilized to amplify the received RF carrier signal from the antenna. Besides, there are no any inductors required. The second stage is a multi-stage amplifier to amplify the output signal of first stage to rail-to-rail level, which is quite the same with supply voltage. The third stage is a mixer adopted to lower the signal frequency. The fourth stage is a digital output converter, which is proposed to demodulate the electric signals and convert the demodulated signal to digital signal.

The invention discloses a semiconductor memory, a system, and a method of operating the semiconductor memory. A memory has memory cells in a matrix; a first selection unit selecting any of first signal lines in the memory cells, in response to an access request; a second selection unit selecting any of second signal lines in the memory cells, after the first selection unit starts operating; a first voltage generation unit generating a first power supply voltage supplied to the first selection unit; a second voltage generation unit generating a second power supply voltage supplied to the second selection unit, when a start-up signal is active; a switch short-circuiting first and second power supply lines, when a short-circuit signal is active; and a power supply voltage control unit which activates the start-up signal in response to the access request, activates the short-circuit signal after a predetermined time elapses since activation of the start-up signal, deactivates the short-circuit signal and the start-up signal after completion of access operations.

The invention discloses an inrush current limiter in a power supply, comprising a resistor, a field effect transistor and a gate driver. In a startup moment of the power supply, the gate driver does not start the field effect transistor so that an inrush current passes by the resistor and the resistance is limited to a safety value; and in a steady state of the power supply, the field effect transistor is already started by the gate driver so that a steady state current passes by the field effect transistor and the power dissipation is reduced by the field effect transistor to a minimum.

The invention discloses a field programmable gate array (FPGA) power-on reset system which comprises a power-on reset circuit and a reset signal detection circuit, wherein the power-on reset circuit is used for generating power-on reset (POR) pulse signals, the reset signal detection circuit is used for ensuring reset validity of the POR signals, and the power-on reset circuit is connected with the reset signal detection circuit. The power-on reset circuit transmits the POR pulse signals when voltage drain drain (VDD) of a chip first power supply rises to 1.6V, and the POR pulse signals are used for controlling resetting of an FPGA chip. By adopting the FPGA power-on reset system, the dynamic switching loss and short circuit power of the chip are reduced in the FPGA chip power on process, and safety and starting stability of the FPGA chip are improved.

The invention discloses a charging circuit used for a mobile power supply and a mobile power supply. The charging circuit comprises a charging interface used for receiving an external input power supply, a discharging interface used for external connection with a load, a built-in cell used for storing electric energy, and a detection circuit used for detecting plugging states of the charging interface and the discharging interface. When the detection circuit detects that an input power supply accesses the charging interface, the input power supply is utilized to charge a load connected onto the discharging interface directly, the cell is controlled to stop charging the load. The mobile power supply utilizes an external input power supply to charge a load inserted into the mobile power supply directly when an input power supply is connected, thus the dissipation power of the mobile power supply can be lowered greatly, the heating value of the mobile power supply is lowered, that performances of an electronic device inside the mobile power supply cannot be lowered caused by too high working temperature is ensured, and the working reliability of the mobile power supply is raised.

The invention discloses a memristor-based bandwidth adjustable low-pass filter circuit and an operation method thereof. The circuit is composed of a first-order active low-pass filter circuit including a memristor and a programming circuit including a memristor. The threshold voltage characteristics of the memristor are utilized, the working modes of the memristor are divided into an analog working mode and a programming working mode, and the bandwidth of the filter circuit is changed by changing the resistance value of the memristor. The programming circuit is composed of the memristor, four NMOS tubes and four PMOS tubes. The first-order active filter circuit is composed of the memristor, a capacitor and an operational amplifier. The invention also discloses a memristor-based bandwidth adjustable high-pass filter circuit and an operation method thereof. The circuit has the advantages that the active filter circuit is low in input impedance and high in output impedance, and the programming circuit has the advantages of being small in volume occupation, high in degree of integration, low in power consumption and easy to operate so that the circuit is suitable for signal filtering processing.

Disclosed herein are representative embodiments of methods, apparatus, and systems used for generating test patterns as may be used as part of a test pattern generation process (for example, for use with an automatic test pattern generator (ATPG) software tool). In one exemplary embodiment, hold probabilities are determined for state elements (for example, scan cells) of a circuit design. A test cube is generated targeting one or more faults in the circuit design. In one particular implementation, the test cube initially comprises specified values that target the one or more faults and further comprises unspecified values. The test cube is modified by specifying at least a portion of the unspecified values with values determined at least in part from the hold probabilities and stored.

A local area networking apparatus comprises a power stage for connecting to a network cable for carrying power and data. The power stage comprises a main current flow path which includes a switch comprising at least one transistor positioned in the main current flow path and a current monitoring apparatus for monitoring current flow in the main current flow path, and wherein the current monitoring apparatus comprises a sensor which is not placed in series with the main current flow path. The current monitoring apparatus can comprise a current mirroring stage which is arranged to mirror current flowing in the main current flow path to a monitoring current flow path. The switch can be implemented as a set of switches.

The invention discloses a miniature airborne up-converter which is composed of three parts of a local oscillator circuit, a frequency conversion channel circuit and a power control circuit. An output end of the local oscillator circuit and the power control circuit are connected with the frequency conversion channel circuit respectively. Manufacturing processes include steps of circuit design, circuit wiring, circuit electric fitting, final assembly and multi-channel quality test. Stray rejection ratio of local oscillator signals is improved greatly, and power dissipation of the whole machine is reduced, meanwhile, broadband phase discrimination is used, phase discrimination frequency is improved, rapid capture broadband is added, frequency agility time is increased, and problems of miscellaneous inhibition capacity, frequency agility time and the like of local oscillator signals are solved; a mixer with high compression is used as frequency spectrum flitting, secondary frequency conversion is used, needed broadband signals are produced through the secondary frequency conversion and output by amplification of filtering waves, stray is effectively restrained, and anti-interference capability is enhanced; and multi-channel quality test is used in the manufacturing process, checks are performed at all levels, and product yield and product quality are greatly improved.

The invention discloses a vehicle applied power supply system and an active mixing rectifier and a control method. The vehicle applied power supply system comprises a motor, excitation coils, a voltage regulator and a rectifier. The rectifier is an active mixing rectifier which consists of a three-phase bridge type rectifier and a rectifier control circuit. The upper bridge arm of the three-phase type rectifier adopts diodes to rectify while the lower bridge arm adopts a MOSFET tube to rectify. When a certain phase voltage of the motor is greater than the voltage outputted by the rectifier, the rectification diode corresponding to the phase turns on; when a certain phase voltage of the motor is smaller than the voltage outputted by the rectifier, the rectification diode corresponding to the phase turns off. The rectifier control circuit receives the signal outputted from the phase wires of the motor and serves as the driving signal provided to the grating electrode of the MOSFET tube. When a certain phase voltage of the motor is smaller than the ground voltage, the rectifier control circuit provides a control signal to control the MOSFET tube corresponding to the phase to be on; otherwise, the MOSFET tube corresponding to the phase is off. The invention can be applied to a variety of vehicle applied power supply systems.

The differential output of a Programmable Gain Amplifier (PGA) is loaded by the input differential gate capacitance of a plurality of Analog to Digital convertors (ADC) comparators and the differential metal layer traces to interconnect these comparators to the PGA. The differential capacitive load presented to the PGA is quite large and reduces the bandwidth of this interconnect between the PGA and ADC. To overcome the performance degradation due to the differential capacitive load, an active negative-capacitor circuit cancels the effect of the large input capacitance of the ADC comparators. This cancelation extends the gain characteristics of the interconnect between the PGA's output and the inputs of the first stage of the comparators. The active negative-capacitance is comprised of a cross pair NMOS with a capacitor connecting their sources where each NMOS is biased by a current source.

The invention discloses a multi-stator traction high-speed maglev train system. A plurality of linear motor sets are averagely dispersed on a magnetic levitation channel line; four linear stators of each linear motor set are concentrated together to drag a strip-shaped plate long rotor under the whole maglev train; the maglev train is continuously dragged to run in an uninterrupted seamless relaymanner; the distance between the magnetic suspension air gaps of about 8mm is small; the powerful magnetic levitation force and guiding force are generated between the strip-shaped electromagnet and the strip-shaped iron core; wireless power supply operation of the high-speed maglev train system is achieved through a high-voltage long-wire power supply system, a photovoltaic cell panel and a storage battery power supply system. Double braking of an electromagnetic braking system and a mechanical braking system of the high-speed maglev train is organically matched. The safety of the maglev train during high-speed operation is ensured, the stability and reliability of the maglev height of the train are improved through the mechanical positioning effect of the front pulleys and the rear pulleys, and a supporting pressure difference constant device enables the supporting pressure and resistance of the front pulleys and the rear pulleys to be small.

An opto-isolator multi-voltage detection circuit is capable to handle a wide range of input voltages ranging from about 9 volts DC to about 240 volts AC includes an input voltage, an opto-isolator, a rectifier, a voltage divider, first and second transistors, and a DC to DC converter. The voltage divider operatively coupled to the first and second transistors is capable of evenly dividing the input voltage across the first and second transistors. The DC to DC converter operatively coupled to the transistors, the voltage divider, and the opto-isolator is capable of maintaining an output current from the rectifier. The use of the DC to DC converter, the voltage divider, and the transistors provide benefit of reducing a power dissipated throughout the entire circuit.

The invention discloses a control method and device for narrow pulse filter, a storage device and narrow pulse filtering equipment. The method comprises the following steps: receiving a pulse signal used for driving a switching tube of a switching circuit; detecting the level state of the received pulse signal; when detecting that the level of the received pulse signal is a high level or a low level, outputting the corresponding high level or low level to the switching tube; when detecting that the level of the received pulse signal goes into the state of a rising edge, pausing to detect the level state and starting to time, and when a timing value is within a first pulse width limit threshold, outputting the low level to the switching tube; and when detecting that the level of the received pulse signal goes into the state of a falling edge, pausing to detect the level state and starting to time, and when the timing value is within a second pulse width limit threshold, outputting the high level to the switching tube. The control method for the narrow pulse filter provided by the embodiment of the invention reduces the dissipation power of the switching tube, improves the overall working efficiency of a circuit, and adjusts the output pulse width.

The invention relates to a festival decoration lamp string with multiple parallel wires and a preparation method of the festival decoration lamp string. The festival decoration lamp string comprises alamp string body which is internally provided with the anode wires and the cathode wires, wherein the anode wires and the cathode wires are arranged in parallel in the axial direction; a plurality ofanode solder joints and first breakpoints are arrayed on the anode wires, and a plurality of cathode solder joints corresponding to the anode solder joints, and second breakpoints are arrayed on thecathode wires; a lamp soldering area is formed opposite to the anode solder joints and the cathode solder joints; and LED lamp beads are flatly or laterally attached into the lamp soldering area, thefirst breakpoints and the second breakpoints are arranged on the anode wires and the cathode wires in a staggered mode correspondingly, and meanwhile the first breakpoints and the second breakpoints are vertically staggered, so that the LED lamp beads between the anode wires and the cathode wires are in series-parallel connection. The problem that many LED lamps need to be connected into a traditional lamp string in series in a high-voltage occasion is solved, the current of all sets of LED lamp beads which are connected in series can be very small through the high voltage, the consumed poweris reduced, the constant current is conducted through a series-parallel connection mode, consistency is good, and the cost is lowered greatly.

The LED drive circuit of the present invention is a high-voltage LED linear constant current drive circuit, which is composed of two parts, an AC/DC conversion circuit AC/DC and a linear constant current source circuit, in addition to the LED light source module. The linear constant current source circuit part mainly includes amplifier A, constant current output adjustment tube T, reference reference power supply Vfer, working power supply VDD, output current sampling resistor R _F and output current shunt resistor R. The LED drive circuit of the present invention, when the constant current output adjustment tube T is subjected to voltage rise, bypasses a part of the output current through the shunt resistor R connected in parallel with the output terminal of the constant current adjustment tube T, so as to reduce the power dissipation of the constant current adjustment tube T , reduce temperature rise and improve stability. The higher the voltage withstood by the output end of the constant current adjusting tube T, the greater the bypass current of the shunt resistor R. As long as you choose the appropriate shunt resistor resistance, and arrange the shunt resistor reasonably to keep it away from thermally sensitive devices, and control the temperature rise of the constant current regulator tube within a safe range, the stability of the constant current drive circuit can be improved and the expansion can be extended. scope of application.