System and method for realizing plc high-speed pulse counting based on fpga

Abstract

The invention provides a programmable logic controller (PLC) high speed pulse counting implementation system based on a field programmable gate array (FPGA). The PLC high speed pulse counting implementation system based on the FPGA comprises the FPGA. The FPGA comprises a dual-port block random access memory (RAM), a comparison control state machine and a counter pile, wherein the dual-port block RAM comprises multiple groups of comparison registers, the counter pile comprises multiple counters which are used for counting input pulses, each counter in the counter pile corresponds to one group of comparison registers in the dual-port block RAM, and the comparison control state machine is used for reading the value of each comparison register from the dual-port block RAM in a cyclic mode and comparing the value of each comparison register with the value of one corresponding counter in the counter pile. The invention further provides a method corresponding to the PLC high speed pulse counting implementation system based on the FPGA. According to the PLC high speed pulse counting implementation system based on the FPGA and the corresponding method, comparative data are stored in the dual-port block RAM inside the FPGA, the comparison control state machine is used for comparing the comparative data in the dual-port block RAM with the values of the counters in a cyclic mode, and therefore counting and comparison of the high speed pulses through a PLC are realized.

Description

technical field [0001] The invention relates to the field of PLC counting, and more specifically, relates to an FPGA-based PLC high-speed pulse counting comparison system and method. Background technique [0002] PLC (Programmable Logic Controller, Programmable Logic Controller) is widely used in various automation control fields. One of the main functions of PLC is to realize the counting and comparison of different forms of high-speed pulses. [0003] In order to realize the counting comparison function of PLC, most of them are implemented by FPGA (Field-Programmable Gate Array, Field Programmable Gate Array) at present. Design multiple counters and comparison registers in the FPGA. The counter realizes the pulse counting of different modes according to the user's settings. Values ​​are compared to determine whether the count reaches the comparison value. [0004] In order to meet the user's need to set the size of the comparison data value, the counter and the compariso...

AI Technical Summary

Problems solved by technology

[0005] The technical problem to be solved by the present invention is to provide a FPGA-based PLC high-speed pulse counting implementation system and method for the above-mentioned problem that PLC counting consumes a large amount of FPGA lookup table resources

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