A display method for multi-bit flipping of memory based on non-word line segmentation

Abstract

The invention discloses a multi-bit upset display method based on a memorizer without word line segmentation. The display method comprises the steps: selecting a particle flow velocity and a test time; inputting a test stimulus to the memorizer by an FPGA plate, and transmitting data obtained by feedback back to a PC machine through a serial port by the memorizer; and achieving a real-time dynamic graphic interface through a LabView programming in the PC machine, and displaying a position where the multi-bit upset happens in the memorizer. With the display method, a tester can real-timely, intuitively know the position where the multi-bit upset happens and can conveniently timely adjust an experiment, so as to obtain more valuable experimental data.

Description

technical field [0001] The invention relates to a multi-bit flipping display method of memory based on non-word line division, and mainly relates to this type of memory without word line division. That is, there is only row decoding, no column decoding, and a row is a word. Background technique [0002] Various high-energy particles from cosmic rays and trace radioactive elements contained in packaging materials may cause bit flips in the memory, especially when the energy is strong, multi-bit flips may occur. Therefore, it is necessary to perform multi-bit flip detection on the designed memory to find design defects and bottlenecks. [0003] For non-word-line partitioned memories, adjacent bits in the layout of the bits are not adjacent bits in the same word. Moreover, this type of memory tends to have a relatively large capacity. If all the data is read out for detection and judgment, it will waste precious computer time when going online, and at the same time, it will a...

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Problems solved by technology

Moreover, the capacity of this type of memory is often large. If all the data is read out for detection and judgment, it will waste precious time when going online. At the same time, it will also impose high requirements on the transmission bandwidth of the system.

If the relevant problems that occurred during the test cannot be fully considered before the experiment, the experimental test data will be of little significance or even invalid

If the test plan can be adjusted in real time according to the experimental phenomenon, the test will become more meaningful. Therefore, a test plan that can dynamically and real-time display the flipping of multiple bits of the memory is needed to allow testers to understand more clearly which bits of the memory are more accurate. Fragile, more prone to multi-bit flips

But there is no relevant solution yet

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