Erasing/programming method and device of memory

A programming method and technology of a programming device, which are applied in the field of memory erasing/programming methods and devices, can solve problems such as slow erasing/programming speed, and achieve the effect of increasing speed and reducing quantity

Inactive Publication Date: 2013-11-13
GIGADEVICE SEMICON (BEIJING) INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The technical problem to be solved in this application is to provide a memory erasing / programming method and device to solve the problem of slow erasing / programming speed of traditional memory

Method used

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  • Erasing/programming method and device of memory
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  • Erasing/programming method and device of memory

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0050] Embodiment 1, a memory erasing / programming method.

[0051] refer to figure 1 , which shows a flowchart of a method for erasing / programming a memory according to the embodiment of the present application.

[0052] Step 11, performing erase / program operation and erase / program verification on the memory cells in sequence;

[0053] There are two basic storage units in the memory, erase cell (erasing unit) and program cell (programming unit), that is, "1" and "0", so there are two types of memory units for erasing and programming. basic operations.

[0054] When an erase / program pulse arrives, an erase / program operation is performed on the memory cell;

[0055] One erase / program pulse can simultaneously erase / program one or more memory cells.

[0056] If it is in the erase operation, the erase pulse (erase pulse) erases the cell (storage unit), and the purpose of erasing is to erase the cell (storage unit) from the program (programming) state to erase (erase) State, th...

Embodiment 2

[0069] Embodiment 2, a memory erasing method.

[0070] refer to figure 2 , which shows a flowchart of a method for erasing a memory according to the embodiment of the present application.

[0071] Step 21, performing a pre-programming operation on the memory cells in the target block that need to be erased;

[0072] The purpose of the pre-programming operation is to program all memory cells in the block (block) to the same "0" state, that is, a high threshold state. The specific method is to apply a programming voltage on the gate and drain of the memory cell (the programming voltage of modern memory is generally about 9V for the gate and about 4V for the drain, and the voltage value varies with the specific process), through CHE (Channel Hot Electron , channel hot electron physical effect) to achieve.

[0073] Step 22, the first erase pulse erases the pre-programmed memory cells;

[0074] When an erasing pulse arrives, an erasing operation is performed on the memory cell...

Embodiment 3

[0091] Embodiment 3, a memory programming method.

[0092] refer to image 3 , which shows a flow chart of a method for programming a memory according to the embodiment of the present application.

[0093] Step 31, program verification is performed on the memory cells in the target page that need to be programmed;

[0094] The purpose of programming verification is to distinguish which cells (storage units) in the page (page) need to be programmed and which ones do not. The specific method is to apply a programming verification voltage to the gate of the cell (storage unit) Read it through the sensor (sensor) circuit to judge whether the cell (storage unit) has been programmed into the program cell (programming unit) area. When it arrives, it means that the cell (storage unit) does not need to be programmed. If it does not arrive, it means that the cell ( memory cells) need to be programmed.

[0095] Step 32, the first programming pulse programs the memory cells that need t...

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Abstract

The invention provides an erasing/programming method and device of memory, so as to solve the problems of low erasing/programming speed of a conventional memory. The method comprises the steps of carrying out erasing/programming operation and erasing/programming verification on a memory cell successively; if the erasing/programming verification is not passed, continuing a cyclic operation of erasing/programming erasing/programming verification; when a cumulative number of erasing/programming reaches a preset n-th level number and the erasing/programming verification is not passed, adjusting the intensity of erasing/programming according to the strength of the n-th level and continuing the cyclic operations of the erasing/programming and erasing/programming verification; and jumping out the cyclic when the erasing/programming verification passes or the cumulative number of erasing/programming reaches a preset maximum number. The number for erasing/programming pulse is reduced and speed for erasing/programming is greatly increased by adjusting the intensity of the erasing/programming pulse during the cyclic process of erasing/programming.

Description

technical field [0001] The present application relates to the technical field of memory, in particular to a memory erasing / programming method and device. Background technique [0002] At present, memory technology is developing in the direction of increasing integration and reducing component size. When using memory, it is often necessary to store and delete information on the memory. There are two basic storage units in the memory, erase cell (erasing unit) And program cell (programming unit), that is, "1" and "0", so correspondingly there are two basic operations of erasing and programming memory cells. The storage capacity, power consumption and reliability of the memory, as well as the speed of erasing and programming are all important indicators to measure the quality of the memory. [0003] In the prior art, the erasing and programming method of the memory is a cyclic operation of erasing and programming the memory cell with a pulse of constant intensity, and the eras...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/10G11C11/4063G11C11/413
Inventor 舒清明苏志强张现聚丁冲
Owner GIGADEVICE SEMICON (BEIJING) INC
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