A thermal resistance extraction method of soi_mosfet
An extraction method and technology of thermal resistance, applied in the field of thermal resistance extraction of SOI_MOSFET, can solve the problems of expensive PIV equipment, increased experimental cost, inconvenience, etc., and achieve the effect of avoiding high cost
Active Publication Date: 2016-03-23
BEIJING ZHONGKE XINWEITE SCI & TECH DEV
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Problems solved by technology
[0005] At present, the PIV method is mainly used to measure thermal resistance, but the PIV equipment is relatively expensive, and many laboratories or companies do not have this equipment
It brings inconvenience to the practical application
It also increases the experimental cost
Method used
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[0018] Embodiments of the present invention are described in detail below.
[0019] Examples of the described embodiments are shown in the drawings, wherein like or similar reference numerals designate like or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary only for explaining the present invention and should not be construed as limiting the present invention. The following disclosure provides many different embodiments or examples for implementing different structures of the present invention. To simplify the disclosure of the present invention, components and arrangements of specific examples are described below. Of course, they are only examples and are not intended to limit the invention. Furthermore, the present invention may repeat reference numerals and / or letters in different instances. This repetition is for the purpose of simplicity and clarity and does not in i...
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The invention provides a method for extracting the thermal resistance of SOI-MOSFET. The method comprises the following steps: a device is designed; connecting wires are led out from both ends of the grid structure of the device; the resistance of the grid structure is measured at different temperatures so as to obtain the characteristic of resistance variation with temperature of the grid structure; at the normal temperature, the resistance of the grid structure is measured when the device in the working state; the resistance of the grid structure at the normal temperature is substituted into the characteristic of resistance variation with temperature to obtain the true temperature of the device in the working state, so as to obtain the thermal resistance of the device. Compared with the prior art, the technical scheme provided by the invention has the advantages as follows: the thermal resistance of the device is extracted by virtue of the characteristic of resistance variation with temperature of the grid structure, so that the method is simple and feasible, and the problem that the cost is too high duo to the adoption of PIV equipment is solved.
Description
technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for extracting thermal resistance of SOI_MOSFET. Background technique [0002] SOI (Silicon-On-Insulator, silicon on insulating substrate) technology introduces a layer of BOX (Buried Oxide, buried oxide) layer between the top silicon and the back substrate. By forming a semiconductor thin film on an insulator, the SOI material has the incomparable advantages of bulk silicon: it can realize the dielectric isolation of components in integrated circuits, and completely eliminate the parasitic latch effect in bulk silicon CMOS circuits; The integrated circuit also has the advantages of small parasitic capacitance, high integration density, fast speed, simple process, small short channel effect, and is especially suitable for low-voltage and low-power circuits. Therefore, it can be said that SOI will likely become a deep submicron low-voltage , The mainstream technol...
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IPC IPC(8): G01N25/20
Inventor 卜建辉李莹毕津顺李书振罗家俊韩郑生
Owner BEIJING ZHONGKE XINWEITE SCI & TECH DEV