Unlock instant, AI-driven research and patent intelligence for your innovation.

Polygon channel layer multiple-grid structure tunneling transistor and forming method thereof

A technology of tunneling transistors and channel layers, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems of limited application, insufficient current driving capability, and low TFET turn-on current, and achieve enhanced Gating capability, improved subthreshold region slope, effect of small off-state current

Inactive Publication Date: 2013-11-27
TSINGHUA UNIV
View PDF8 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the problem of the small opening current of the existing TFET limits its application to a certain extent.
However, the current driving capability of circular gate TFETs is still not enough for application, so it is urgent to propose new TFET devices

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Polygon channel layer multiple-grid structure tunneling transistor and forming method thereof
  • Polygon channel layer multiple-grid structure tunneling transistor and forming method thereof
  • Polygon channel layer multiple-grid structure tunneling transistor and forming method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0046] The embodiments of the present invention are described in detail below. Examples of the embodiments are shown in the accompanying drawings, in which the same or similar reference numerals indicate the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary, and are only used to explain the present invention, and cannot be construed as limiting the present invention.

[0047] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", " The orientation or positional relationship indicated by "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying The description does not indicate or i...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
Thicknessaaaaaaaaaa
Login to View More

Abstract

The invention provides a polygon channel layer multiple-grid structure tunneling transistor and a forming method thereof. The polygon channel layer multiple-grid structure tunneling transistor comprises a substrate, a channel layer and a grid stack, wherein the channel layer is formed above the substrate, the cross section of the channel layer is in a polygon in the extending direction perpendicular to the channel layer, the grid stack is formed above the channel layer and comprises a grid medium layer next to the channel layer, and a grid electrode next to the grid medium layer, and the grid stack covers all the side faces or a plurality of continuous adjacent side faces of the channel layer. The polygon channel layer multiple-grid structure tunneling transistor has the advantages of being small in off-state current, large in on-state current, high in capability of restraining the short channel layer effect and capability of conducting equal proportion shrinking and the like.

Description

Technical field [0001] The invention relates to the field of semiconductors, in particular to a tunneling transistor with a polygonal channel layer multi-gate structure and a method for forming the same. Background technique [0002] As the channel length of the transistor decreases, the characteristics of traditional MOSFET devices continue to deteriorate as the short-channel effect increases. The off-state leakage current of the device continues to increase, which makes the power consumption of the chip increase sharply. In the post-Moore era, the application of new materials and devices with new structures has become a hope for continuation of Moore's law into the nanoscale. Among the many new structure devices, the tunneling field effect transistor (TFET) is one of the very important new devices. It not only can effectively overcome the short channel effect of MOSFET in small size, but also has low subthreshold swing and off The feature of low state current can effectively ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L29/78H01L29/10H01L29/423H01L21/336
Inventor 刘立滨梁仁荣许军王敬
Owner TSINGHUA UNIV