Heat dissipation structure for PoP encapsulation

Abstract

The invention discloses a heat dissipation structure for PoP encapsulation. The heat dissipation structure for PoP encapsulation comprises an upper encapsulation body, a lower encapsulation body, BGA supporting balls, BGA balls, a heat dissipation cover and a thermal interface material. The upper encapsulation body comprises an upper encapsulation substrate and a plurality of upper encapsulation heat conducting chips or devices attached to or welded to a plurality of thermal vias of the upper encapsulation substrate of the upper encapsulation body. The lower encapsulation body comprises a lower encapsulation substrate and a plurality of lower encapsulation heat conducting chips or devices attached to or welded to the surface of the lower encapsulation subtrate. The BGA supporting balls are formed between the upper encapsulation body and the lower encapsulation body and used for achieving mutual electrical connection between the upper encapsulation body and the lower encapsulation body. The BGA balls are formed on the back face of the lower encapsulation substrate of the lower encapsulation body so as to support the upper encapsulation body and the lower encapsulation body. The upper encapsulation body is covered with the heat dissipation cover so that heat dissipation and shielding of the upper encapsulation heat conducting chips or devices of the upper encapsulation body can be achieved. The thermal interface material is formed between the upper encapsulation heat conducting chips or devices of the upper encapsulation body and the heat dissipation cover so as to reduce the thermal contact resistance between the upper encapsulation body and the heat dissipation cover.

Description

technical field [0001] The invention relates to the technical field of stacked packaging (Pacakge on Package, PoP) for integration of memory and processor and integration of radio frequency (Radio Frequency, RF) transceiver components, in particular to a heat dissipation structure for PoP packaging. Background technique [0002] figure 1 It is a schematic diagram of a PoP package structure in the prior art, wherein 10 is an upper package structure; 11 is a ball grid array (Ball Grid Array, BGA) solder ball; 20 is a lower package structure; 21 is a conductive column; 22 is a molded sealing material; 23 is a PCB substrate; 30 is a connection layer; the connection layer 30 is composed of a solder layer 31 , a metal layer 32 and an adhesive layer 33 . The PoP packaging structure is formed by interconnecting the upper packaging structure 10 and the lower packaging structure 20 through BGA solder balls 11 and the connection layer 30 . The BGA solder balls 11 play the role of ele...

AI Technical Summary

Problems solved by technology

However, the heat dissipation of the upper package is a bottleneck. Most of the heat generated by the upper package chip passes through the upper package, the BGA support ball, the lower package, and then conducts to the substrate, and finally dissipates to the external environment. The heat is not easy to dissipate, which affects the package. Increased body junction temperature limits stacked chip power and number of stacks

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