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Method to control underfill fillet width

An underfill and width technology, applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., can solve problems such as insufficient treatment of underfill exudation

Inactive Publication Date: 2014-02-19
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

These unbalanced underfill overflows can create high stress concentrations on the die
Also, conventional tools and methods for underfill are insufficient to deal with underfill seepage, which may not be ideal

Method used

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  • Method to control underfill fillet width
  • Method to control underfill fillet width
  • Method to control underfill fillet width

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Embodiment Construction

[0032] In the following description, numerous specific details are set forth in order to provide a thorough understanding of embodiments of the invention. However, one of ordinary skill in the art will recognize that embodiments of the invention may be practiced without these specific details. In some instances, well-known structures and processes have not been described in detail to avoid unnecessarily obscuring the embodiments of the invention.

[0033] Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular component, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, appearances of the phrases "in one implementation" or "in an embodiment" in various places in this specification are not necessarily all referring to the same embodiment. Furthermore, particular components, structures or features may be combined in any suitable manner in ...

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PUM

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Abstract

A semiconductor device assembly includes a substrate having an area of the surface treated to form a surface roughness. A die is mounted on the substrate by a plurality of coupling members. An underfill substantially fills a gap disposed between the substrate and the die, wherein a fillet width of the underfill is substantially limited to the area of surface roughness.

Description

technical field [0001] The present invention relates to semiconductor device packaging, and in particular, to a method of controlling the overflow width of an underfill. Background technique [0002] When a semiconductor device such as an integrated circuit (IC) chip is assembled on a substrate, the chip is separated from the substrate by solder bumps, thereby forming a gap between the chip and the substrate. It is well known that there is a significant difference between the coefficient of thermal expansion (CTE) of the chip and the substrate. When components are temperature cycled during device use or reliability testing, due to this CTE difference, thermomechanical stresses are generated at the solder interconnects, especially in the joint area. These stresses tend to fatigue joints and bumps, leading to component fracture and eventual failure. [0003] To distribute mechanical stress and strengthen the solder joint without compromising the electrical connection, the ga...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/54H01L23/16
CPCH01L21/563H01L2224/16225H01L2224/92125H01L2224/26175
Inventor 陈孟泽郑荣伟林俊成蔡钰芃郑明达刘重希
Owner TAIWAN SEMICON MFG CO LTD