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Multi-channel adc synchronous sampling intermediate frequency receiver and synchronous sampling method

A synchronous sampling, multi-channel technology, applied in electrical components, transmission systems, etc., can solve problems such as low efficiency and inability to achieve full probability reception, and achieve the effect of low cost and high processing efficiency

Active Publication Date: 2016-02-03
CHENGDU JIUHUA YUANTONG TECH DEV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, this invention can only deal with a single signal, and the efficiency is extremely low, but it cannot achieve full probability reception

Method used

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  • Multi-channel adc synchronous sampling intermediate frequency receiver and synchronous sampling method
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Embodiment Construction

[0020] The technical solution of the present invention will be further described in detail below in conjunction with the accompanying drawings, but the protection scope of the present invention is not limited to the following description.

[0021] like figure 1 As shown, the multi-channel ADC synchronous sampling intermediate frequency receiver includes a first FPGA chip, a second FPGA chip, a third FPGA chip, a first DSP chip, a second DSP chip, a first multi-channel ADC module, a second multi-channel The ADC module and the clock distribution module, the signal output of the first multi-channel ADC module is connected to the signal input of the first FPGA chip, the first FPGA chip and the first DSP chip are connected by a bidirectional multi-channel data transmission line, and the second multi-channel ADC The signal output of the module is connected to the signal input of the second FPGA chip. There is a bidirectional multi-channel data connection between the second FPGA chip...

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Abstract

The invention discloses a multichannel ADC synchronous sampling intermediate frequency receiver and a synchronous sampling method. The method includes: by a multichannel ADC module, sampling signals, and transmitting the sampled and converted digital signals to an FPGA chip; by the FPGA chip in coordination with a four-channel digital down converter, extracting I / Q components; transmitting the extracted I / Q components to a DSP chip for processing. The method has the advantages that multichannel signal sampling is used, the sampling clocks are mutually independent, smart switching of inner and outer clocks can be controlled, the combination of the multichannel ADC module, the four-channel digital down converter and the FPGA chip is used, and high processing efficiency and low cost are achieved.

Description

technical field [0001] The invention relates to a digital intermediate frequency processing technology, in particular to a multi-channel ADC synchronously adopting an intermediate frequency receiver and a synchronously adopting method. Background technique [0002] Existing IF digital receivers are mainly composed of a single analog-to-digital converter (ADC) and a digital down-converter. Convert the signal of interest to the baseband, and perform sampling rate conversion and filtering processing at the same time, and then send the orthogonal I and Q signals to the subsequent digital signal processor for baseband signal processing. In the entire IF receiver, the digital downconverter is The core of the entire IF digital receiver, but usually, the existing IF digital receiver can only realize single-channel signal sampling, with low working efficiency and single working mode. For the implementation method of the existing multi-channel intermediate frequency receiver, there a...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04B1/00H04B1/30H04B1/16
Inventor 宁涛肖聪王润洪吴伟冬宁昕黎飞宏
Owner CHENGDU JIUHUA YUANTONG TECH DEV