Fuse trimming and adjusting circuit

Abstract

The invention discloses a fuse trimming and adjusting circuit comprising a switch control module, a trimming and adjusting value loading module, a fuse fusing control module and a trimming and adjusting module. The trimming and adjusting module comprises a PMOS transistor, a first resistor, a fuse, an NMOS transistor, a second resistor, and a D trigger. The source electrode of the PMOS transistor is connected with a voltage-stabilization power source; the grid electrode of the PMOS transistor is connected with the switch control module; the drain electrode of the PMOS transistor is connected with one end of the first resistor; the other end of the first resistor is connected with one end of the fuse; the other end of the fuse is connected with the source electrode of the NMOS transistor; the grid electrode of the NMOS transistor is connected with the fuse fusing control module; the drain electrode of the NMOS transistor is grounded; one end of the second resistor is connected with the source electrode of the NMOS transistor; the other end of the second resistor is grounded; the CP port of the D trigger is connected with the trimming and adjusting value loading module; and the D port of the D trigger is connected with the source electrode of the NMOS transistor. With the fuse trimming and adjusting circuit, a wafer can be trimmed and adjusted after being packaged, thereby reducing cost and improving trimming and adjusting precision.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a fuse trimming circuit. Background technique [0002] Analog chips with reference usually need to be fine-tuned after production. Trimming is to select and solidify one of the multiple options integrated in chip design according to customer needs, usually before wafer segmentation and packaging. [0003] Accurate trimming before wafer packaging requires the use of expensive machines, and trimming takes a long time to find the optimal value, resulting in high costs. Especially when the chip needs to be trimmed with different values, trimming before packaging will cause a large inventory cost. [0004] In addition, during wafer packaging, chip dicing and packaging will have an impact on the physical characteristics of the chip, resulting in deviations in the adjusted benchmarks after packaging, failing to meet the required accuracy. Contents of the invention [00...

AI Technical Summary

Problems solved by technology

[0003] Precise trimming before wafer packaging requires the use of expensive machines, and trimming takes a long time to find the optimal value, which is very costly

Especially when the chip needs to be trimmed with different values, trimming before packaging will cause a large inventory cost

[0004] In addition, during wafer packaging, chip dicing and packaging will have an impact on the physical characteristics of the chip, causing deviations in the adjusted benchmarks after packaging, failing to meet the required accuracy

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