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Structure having uniform fin field effect transistor gate height and method of forming the same

A field effect transistor, fin technology, applied in the field of multiple fin field effect transistor (finFET) semiconductor devices

Inactive Publication Date: 2017-03-01
GLOBALFOUNDRIES INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Typically, the gate height measured in low pattern density regions may be lower than that measured in high pattern density regions

Method used

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  • Structure having uniform fin field effect transistor gate height and method of forming the same
  • Structure having uniform fin field effect transistor gate height and method of forming the same
  • Structure having uniform fin field effect transistor gate height and method of forming the same

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Embodiment Construction

[0048] Disclosed herein are detailed embodiments of the claimed structures and methods; however, it is to be understood that the disclosed embodiments are merely illustrations of the claimed structures and methods, which can be embodied in various forms. However, this invention may be embodied in many different forms and should not be construed as limited to the exemplary embodiments disclosed herein. Rather, these exemplary embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the description, well-known features and technical details are omitted to avoid unnecessarily obscuring the embodiments of the invention.

[0049] The present invention relates to the fabrication of fin field effect transistor (finFET) devices, and more particularly to achieving consistent gate heights across groups of finFETs with varying device densities. Due to variations in pattern density, su...

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Abstract

A method and structure are disclosed. The method includes: providing a fin etched from a semiconductor substrate and covered by an oxide layer and a nitride layer, the oxide layer being disposed between the fin and the nitride layer; removing a portion of the fin to form an opening; forming a dielectric spacer on the wall; and filling the opening with a fill material, wherein a top surface of the fill material is substantially flush with a top surface of the nitride layer. The method also includes forming a deep trench capacitor in line with one of the fins; removing the nitride layer to form a gap between the fin and the fill material, wherein the fill material has a concave geometry extending over the gap, and removing the nitride layer. shape geometry and cause the gap between the fin and fill material to widen.

Description

technical field [0001] The present invention relates generally to integrated circuits, and more particularly to multiple fin field effect transistor (finFET) semiconductor devices having uniform gate heights. Background technique [0002] It is desirable to achieve optimal functionality with dimensional uniformity of semiconductor device structures. Dimensional variations can affect the fabrication and ultimately reliability of semiconductor devices, such as finFET devices. Typical process flows used to fabricate finFET devices can produce large variations in gate height. Gate heights vary significantly within a single chip due to variations in pattern density across the chip. A high pattern density area may include multiple fins, while a low pattern density area may include one or two fins. Typically, the gate height measured in low pattern density regions may be lower than that measured in high pattern density regions. [0003] Typically, a gate first process flow may ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/28H01L21/336H01L29/423H01L29/78
CPCH01L21/845H01L27/1211H01L29/66181H01L29/945H01L29/66545
Inventor W.科特J.E.福尔特迈耶B.A.卡恩R.拉马钱德兰T.E.斯坦达尔特汪新慧
Owner GLOBALFOUNDRIES INC