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A fpga-based high-bandwidth ethernet ip core

An Ethernet, high-bandwidth technology, applied in the field of network communication, can solve the problem of low average communication rate and achieve the effect of complete architecture

Active Publication Date: 2017-05-03
西安中科飞图光电科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] Aiming at the deficiencies of the prior art, the present invention develops and designs a FPGA-based Ethernet IP core, which solves the problem that the average communication rate is not high in the real-time data transmission process of Gigabit Ethernet in the embedded application field, so that it can It is more convenient to apply in the field of Ethernet transmission and communication with large data volume and high bandwidth

Method used

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  • A fpga-based high-bandwidth ethernet ip core
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  • A fpga-based high-bandwidth ethernet ip core

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Embodiment Construction

[0030] specific implementation plan

[0031] Ethernet IP core among the present invention is on the FPGA architecture system based on CycloneIII series, and the Ethernet PHY chip that circuit board adopts is 88E1111, adopts the RJ45 interface of HALO Company; The development board of CycloneIII series of Altera Company or meets following requirement The board can implement the system:

[0032] 1) Equipped with Gigabit Ethernet interface and PHY chip;

[0033] 2) With a custom IO interface;

[0034] 3) Onboard CycloneIII series FPGA chip.

[0035] After power supply, the FPGA uses the MDC / MDIO interface to configure the physical layer chip PHY. After the PHY chip completes the negotiation of transmission speed and related information, an effective and reliable connection is established.

[0036] The Ethernet IP core receiving module among the present invention detects 8 initial bytes of the Ethernet frame header of the port in real time, after receiving the Ethernet frame he...

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Abstract

The invention provides an Ethernet IP core based on an FPGA. The Ethernet IP core solves the problem that in the embedded application field, the mean value of the communication speed is low in the gigabit Ethernet real-time data transmission process, and the Ethernet IP core can be more conveniently applied to the field of large-data-volume and high-bandwidth Ethernet transmission communication. The high-bandwidth Ethernet IP core based on the FPGA comprises a receiving module, an ARP frame processing module, an Ethernet data frame processing module and a sending module. The receiving module is sued for receiving network data, detecting the initial byte of an Ethernet frame header in real time, receiving a whole Ethernet frame after it is determined that the Ethernet frame header is received, judging the protocol type of the received Ethernet frame and dividing the received Ethernet frame into an ARP data frame and an Ethernet data frame so as to be placed into two different cache regions respectively. The sending module is provided with a plurality of FIFO with dual ports, wherein at least one port corresponds to a response frame replied by the ARP frame processing module.

Description

technical field [0001] The invention belongs to the technical field of network communication, and relates to the design and development of an FPGA-based high-bandwidth Ethernet IP core. [0002] technical background [0003] At present, Ethernet-based data transmission communication has been widely used, but most of these applications rely on the combination of computers and network cards to achieve. For some data transmission requirements in the field of embedded systems, such an implementation method is not suitable. [0004] In the development of embedded systems, microprocessors such as ARM or DSP are generally used to realize network transmission and communication. However, since the microprocessor runs its internal program for data processing, it has the characteristics of time-sharing and multi-tasking processing. At the same time, multiple tasks are processed in parallel at the same time, which leads to the defect that the peak value of its network transmission rate ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/02
Inventor 刘广森赵晓冬周祚峰刘庆边河郭惠楠张辉郭云曾常三三
Owner 西安中科飞图光电科技有限公司
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