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Allocating threads to resources using speculation metrics

A resource allocation and threading technology, applied in the direction of resource allocation, program synchronization, multiprogramming device, etc., can solve problems such as helpless instruction throughput, restricted resources, and incorrectness.

Active Publication Date: 2014-07-23
MIPS TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

While correct prediction can significantly improve instruction throughput, incorrectly predicted instructions not only do not help instruction throughput, but they also tie up precious resources

Method used

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  • Allocating threads to resources using speculation metrics
  • Allocating threads to resources using speculation metrics
  • Allocating threads to resources using speculation metrics

Examples

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Embodiment Construction

[0024] Embodiments of the invention are described below by way of example only. These examples represent the best method currently known to applicants to put the invention into practice, but they are not the only way in which this can be done. The description clarifies the functionality of the example and the sequence of steps used to build and run the example. However, the same or equivalent functions and sequences can be performed by different examples.

[0025] Embodiments described herein combine the superscalar and multithreading techniques described above to improve parallel processing in processors. In particular, the processors and methods described herein implement branch prediction and multithreading, where resources are assigned to threads based on speculative metrics. Each speculative metric represents how speculative an instruction associated with a particular thread is. The more speculative an instruction is, the more likely that instruction has been incorrect...

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Abstract

The invention describes allocating threads to resources using speculation metrics. A method, a reservation station and a processor for allocating resources to a plurality of threads based on the extent to which the instructions associated with each of the threads are speculative. The method comprises receiving a speculation metric for each thread at the reservation station. Each speculation metric represents the extent to which the instructions associated with a particular thread are speculative. The more speculative an instruction, the more likely the instruction has been incorrectly predicted by a branch predictor. The reservation station allocates functional unit resources (e.g. pipelines) to the threads based on the speculation metrics, and selects a number of instructions from one or more of the threads based on the allocation. The selected instructions are then issued to the functional unit resources.

Description

Background technique [0001] A number of techniques exist to increase the throughput of a central processing unit (CPU). One is to increase instruction-level parallelism by using superscalar architectures. This increases the performance of a single thread by allowing more than one instruction from the instruction stream to be executed per clock cycle. The other is to increase parallelism at the thread level by using multicore or simultaneous multithreading architectures that can allow instructions from more than one thread to operate in parallel. [0002] As the width of a superscalar architecture increases (eg, the number of executable instructions per clock cycle increases), there are correspondingly more instructions in the pipeline that can affect program flow (eg, branches) at the same time. Furthermore, a large number of these branches are conditional, and the outcome of these branches is difficult to know with certainty before previous instructions have progressed furt...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/38G06F9/50
CPCG06F9/3844G06F9/3851G06F9/3842G06F9/4881G06F9/5005G06F9/3836H03M1/00G06F9/52G06F9/00G06F9/3848G06F9/30003
Inventor H·杰克逊P·罗兰
Owner MIPS TECH INC
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