Method for analyzing electric leakage failure of flash memory chip

A flash memory chip, failure analysis technology, applied in static memory, instruments, etc., can solve problems such as easy to miss Bridge failure address, ILD damage, weak contrast, etc.

Active Publication Date: 2014-09-24
WUHAN XINXIN SEMICON MFG CO LTD
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Problems solved by technology

[0007] Similarly, for the situation of tungsten plug bridging caused by insufficient process capability or voids caused by defects, especially when the generated voids are very small and/or only bridges caused by Ti/TiN diffusion, the contrast of SEM observation is very weak , and it is very easy to miss the failure address of the Bridge, which makes it impossible to obtain the abnormal result of the failure analysis (NAF, that is, no abnormality is found); at the same time,

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  • Method for analyzing electric leakage failure of flash memory chip
  • Method for analyzing electric leakage failure of flash memory chip
  • Method for analyzing electric leakage failure of flash memory chip

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[0036] In the following description, numerous specific details are given in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without one or more of these details. In other examples, some technical features known in the art are not described in order to avoid confusion with the present invention.

[0037] It should be understood that the invention can be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals refer to like elements throughout.

[0038]It will be understood that when an element or layer is referred to...

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Abstract

The invention discloses a method for analyzing the electric leakage failure between the bit lines of a flash memory chip, relating to the field of chip failure analysis. With a nondestructive analysis process, the FIB segmentation process is combined with a nanoscale probe measuring process, the failed plug is directly positioned without damaging all materials of the front-end process, the bridges (for example, the bridge at the top, middle or any other position of the plug) at different positions of the plug can be detected, and a relatively good TEM sample can be obtained so as to facilitate subsequent precise observation of TEM; and therefore, the time for failure analysis, the process cost and the like can be greatly reduced while the reliability of the failure analysis is effectively improved.

Description

technical field [0001] The invention relates to the field of chip failure analysis, in particular to a method for failure analysis of leakage between bit lines of a flash memory chip. Background technique [0002] In various types of traditional flash memory chips (such as mirror bit (Mirror Bit) type flash memory chips or floating gate (Floating Gate) type flash memory chips, etc.), the smallest storage unit is based on a single MOS field effect transistor, and in a physical area In the block, the drain tungsten plugs (Plug) of all column-oriented MOS field effect transistors are connected together by using the bottom metal layer (M1) to form a bit line (Bit Line, BL for short). [0003] Among them, for floating gate (Floating Gate) type flash memory chips, one bottom metal layer (M1) is connected with up to 512 drain tungsten plugs (Plugs) of MOS field effect transistors, and any two plugs in the physical block When the drain tungsten plug (Plug) of adjacent MOS field eff...

Claims

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Application Information

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IPC IPC(8): G11C29/56
Inventor 张顺勇高慧敏
Owner WUHAN XINXIN SEMICON MFG CO LTD
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