A fpga dynamic power consumption estimation method based on bp neural network

Abstract

The invention discloses an FPGA dynamic power consumption estimation method based on a BP neural network. The FPGA dynamic power consumption estimation method comprises the following steps that (1) the input and output quantities of four modules are obtained as sample data; (2) data screening and data preprocessing are carried out on the sample data; (3) BP neural network models of the four modules are respectively constructed according to the processed sample data; (4) part of the sample data are adopted as the training data of the BP neural network, the trained neural network is obtained after BP neural network training is carried out, and then power consumption of neural network output is obtained; (5) the sample data with the training data removed are adopted as the testing data of the BP neural network, and the obtained power consumption is compared with the testing data; (6) the power consumption output by the neural network is restored to be actual power consumption values; (7) the obtained power consumption estimation values of the four modules are summated to obtain a total power consumption value. The power consumption values can be accurately predicted through automatic study of the BP neural network.

Description

Technical field [0001] The invention relates to an FPGA dynamic power consumption estimation method based on a BP neural network, and belongs to the technical field of FPGA dynamic power consumption estimation. Background technique [0002] FPGA power consumption is generally composed of static power consumption and dynamic power consumption. The static power consumption is mainly caused by the leakage current of the transistor and is related to the process; the dynamic power consumption is mainly caused by the charging and discharging of the capacitor, which is mainly reflected in the power consumption of the clock, programmable resources, I / O, and BRAM. Under normal circumstances, dynamic power consumption accounts for a large proportion of total power consumption, so generally speaking, only dynamic power consumption is considered in FPGA power consumption. [0003] At present, mainstream FPGA vendors provide related software to calculate power consumption, such as Xilinx’s Xpo...

AI Technical Summary

Problems solved by technology

The learning speed adaptive adjustment method ensures that the BP neural network can choose the maximum value within the allowable range of the learning rate for learning, but the learning time is still long

The LM algorithm dynamically adjusts the damping factor according to the learning results, that is, the dynamic convergence direction, and the convergence speed is relatively fast, but the learning rate is not improved.

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