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Array substrate, manufacturing method thereof, and display device

A technology of an array substrate and a manufacturing method, which is applied in the field of display, and can solve problems such as small storage capacitance and unfavorable display picture stability

Active Publication Date: 2018-03-09
HEFEI BOE OPTOELECTRONICS TECH +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The inventor found that the storage capacitor on the array substrate in the prior art is small, which is not conducive to the stability of the display screen

Method used

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  • Array substrate, manufacturing method thereof, and display device
  • Array substrate, manufacturing method thereof, and display device
  • Array substrate, manufacturing method thereof, and display device

Examples

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Embodiment 1

[0060] Such as figure 2 and image 3 As shown, the array substrate includes a base substrate 10, a gate line 20, a common electrode 21, and a gate insulating layer 30 ( figure 2 is a schematic plan view of the array substrate, figure 2 The gate insulating layer 30), the active layer 40, the data line 60, the source electrode 61 and the drain electrode 62 arranged on the same layer cannot be seen in the array substrate. The array substrate also includes a pixel electrode 50, and the pixel electrode 50 and the active layer 40 are the same layer settings. At this time, the storage capacitor is the capacitance formed by the pixel electrode 50, the gate insulating layer 30 and the common electrode 21, while in the prior art the storage capacitor is the capacitance formed by the pixel electrode, the passivation layer, the gate insulating layer and the common electrode, and Compared with the prior art, the insulating layer in the storage capacitor in the embodiment of the prese...

Embodiment 2

[0071] An embodiment of the present invention provides a method for manufacturing an array substrate. The method for manufacturing an array substrate is used to manufacture the array substrate described in Embodiment 1. Specifically, the manufacturing process of the array substrate is as follows: Figure 4 shown, including Figure 5 steps shown.

[0072] Step S501 , forming a pattern including gate lines 20 and common electrodes 21 on the base substrate 10 .

[0073] Firstly, a gate metal layer is deposited on the base substrate 10; secondly, a pattern including gate lines 20 and common electrodes 21 is formed through a patterning process. It should be noted that, unless otherwise emphasized, the patterning process in this application includes: coating photoresist, covering with a mask plate having a corresponding pattern, exposing, developing, etching and stripping the photoresist.

[0074] It should be noted that, in the embodiment of the present invention, no gate is form...

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Abstract

The embodiment of the invention discloses an array substrate, a manufacturing method thereof, and a display device, which relate to the field of display technology and can effectively increase storage capacitance. The array substrate comprises a base substrate and sequentially located on the base substrate are gate lines and common electrodes arranged on the same layer, a gate insulating layer, an active layer, a source electrode and a drain electrode arranged on the same layer, and the array substrate It also includes a pixel electrode, and the pixel electrode is arranged in the same layer as the active layer.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate, a manufacturing method thereof, and a display device. Background technique [0002] A liquid crystal display is a commonly used display device, which has the advantages of thinness and low power consumption, and is widely used in multiple technical fields such as display, communication, and multimedia. [0003] Specifically, the liquid crystal display includes an array substrate, and the structure of the array substrate is as follows figure 1 As shown, the array substrate includes a base substrate 1', a gate 2' and a common electrode 3' arranged on the same layer in sequence on the base substrate 1', a gate insulating layer 4', an active layer 5', and The source electrode 6', the drain electrode 7' and the data line 8', the passivation layer 9' and the pixel electrode 10' are arranged in layers. Wherein, the pixel electrode 10', the passivation laye...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/12H01L21/77
CPCG02F1/134336G02F1/136213G02F1/1368G02F2202/10H01L27/1225H01L27/124H01L27/1255H01L27/1288G02F1/13439G02F1/136218G02F1/136231G02F1/136295H01L21/77H01L27/12G02F1/133514G02F1/134309G02F1/136286G02F2201/123H01L29/24H01L29/7869G02F1/1362
Inventor 王盛
Owner HEFEI BOE OPTOELECTRONICS TECH
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