Method and circuit for increasing power supply rejection ratio of low dropout regulator

Abstract

The invention provides a method and a circuit for increasing the power supply rejection ratio of a low dropout regulator. The method and the circuit are advantageous for increasing the high-frequency PSR of the low dropout regulator (LDO). The method is characterized in that a power sampling network ripple transfer path is established by arranging a power sampling network in the circuit of the LDO, and the power sampling network ripple transfer path can be combined with a power tube output impedance ripple transfer path to form a first composite ripple transfer function, and the first composite ripple transfer function is counteracted with the ripple transfer function of a reference voltage source ripple transfer path; or the power sampling network ripple transfer path is established by arranging the power sampling network in the circuit of the LDO, and the power sampling network ripple transfer path is combined with the reference voltage source ripple transfer path to form a second composite ripple transfer function, and the second composite ripple transfer function is counteracted with the ripple transfer function of the power tube output impedance ripple transfer path.

Description

technical field [0001] The invention relates to low dropout linear voltage stabilizer technology, in particular to a method and circuit for improving the power supply rejection ratio of low dropout linear voltage stabilizer. Background technique [0002] Low-dropout linear regulator (LDO) has the advantages of low output noise, simple circuit structure, small chip area occupied and small voltage ripple, etc., and has become an important circuit in power management chips. With the rapid development of integrated circuits, the operating frequency of the chip is continuously increasing, and the power supply rejection ratio (PSR) of the LDO is also reduced, so the power supply noise will affect the performance of the entire system through the LDO, which cannot meet the application requirements of the high frequency working environment. , so improving the power supply rejection ratio under high frequency conditions has become an important research direction of LDO. The above-men...

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Problems solved by technology

However, if you want to ignore the power supply ripple of path ④, it will greatly increase the design difficulty of the reference voltage source Bgr, and even if the designed reference voltage source Bgr makes the power supply ripple of path ④ negligible, this solution is only for suppressing the power supply at low frequencies. The fluctuation scheme does not improve the high frequency PSR

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