An optimization method for strided data transfer for heterogeneous computing systems
A technology for striding data and computing systems, applied in computing, memory systems, electrical digital data processing, etc., can solve problems affecting the efficiency of heterogeneous computing systems, and achieve the effect of improving the efficiency of striding data transmission and improving efficiency
Active Publication Date: 2017-03-15
NAT UNIV OF DEFENSE TECH
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[0012] The technical problem to be solved by the present invention is: to solve the problem that stride data structure transmission seriously affects the efficiency of heterogeneous computing systems, a stride data transmission optimization method for heterogeneous computing systems is proposed to improve the data transmission bandwidth of heterogeneous systems and Improving the Efficiency of Heterogeneous Computing Systems
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[0058] figure 1 It is a schematic diagram of the heterogeneous computing system architecture based on the PCIE communication mode consisting of the main processor CPU and accelerators (such as DSP, GPU, and MIC). Among them, the main processor end has memory, and the accelerator end has global storage space; the main processor Communication and data transmission between the accelerator and the accelerator can only be performed through the PCIE bus.
[0059] figure 2 The array A[128][128] (column-first storage) is strided data Strided A[128][1:3:...:127] strided data structure canvas map, strided data Strided A[128][1: 3:...127] consists of the 1st column, the 3rd column, the 5th column, ..., the 2n″+1, ..., the 127th column of the array A, where 0≤n″≤63. The 2n″+1 column of the array A is the strided data structure component, and the strided data structure stride is strided=128*sizeof(A[0][0]); each column in the strided data is a piece of continuous storage , but the enti...
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The invention discloses a strided data transmission optimization method for a heterogeneous computing system and aims at solving the problem that the efficiency of the heterogeneous computing system is seriously influenced by strided data structure transmission. According to the technical scheme, the method comprises the following steps of firstly, creating a first internal memory buffer area, reading whole canvas map data into the first internal memory buffer area, creating a second internal memory buffer area according to the size of strided data, and sequentially copying all continuous components of the strided data into the second internal memory buffer area to reconstitute a continuous storage data area; secondly, transmitting the strided data which are continuously stored in the second internal memory buffer area into an accelerator-end internal memory in a data message form; finally, releasing the second internal memory buffer area and the first internal memory buffer area. With the adoption of the method, the data transmission bandwidth of the heterogeneous system can be improved, and the efficiency of the heterogeneous computing system is improved.
Description
technical field [0001] The invention relates to a stride data transmission optimization method, in particular to a stride data transmission optimization method for heterogeneous computing systems. Background technique [0002] A heterogeneous computing system is a computer system built by processors with two different architectures, the main processor and the accelerator. At present, mainstream heterogeneous computing systems include CPU+GPU (Graphics Processing Units) and CPU+MIC (Many Integrated Core) to form a heterogeneous computing system. [0003] Usually, in a heterogeneous computing system, data transmission and communication are completed between the main processor and the accelerator in the form of data packets through the PCIE channel. The global communication inside the accelerator must be performed in the global storage space of the accelerator, and some local communications rely on the The shared storage space is completed, and the basic communication mode is ...
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IPC IPC(8): G06F13/40G06F12/0802G06F12/0868
CPCG06F12/0802G06F13/404
Inventor 甘新标刘杰迟利华晏益慧徐涵胡庆丰蒋杰李胜国苏博周怀哲王庆林皇甫永硕崔显涛周陈
Owner NAT UNIV OF DEFENSE TECH