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Power semiconductor device and manufacturing method thereof

A technology of power semiconductors and manufacturing methods, which is applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, transistors, etc., can solve the problems of reduced breakdown voltage, instability, and large leakage current, so as to reduce leakage current, stabilize surface electric field, The effect of enhancing withstand voltage reliability

Active Publication Date: 2017-09-29
CSMC TECH FAB2 CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] Based on this, it is necessary to provide a new solution to the phenomenon that the leakage current of the devices of the existing planar terminal technology is too large or even continuously increases and cannot be stabilized under high temperature conditions, and the breakdown voltage decreases or even short circuit occurs after returning to normal temperature.

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  • Power semiconductor device and manufacturing method thereof
  • Power semiconductor device and manufacturing method thereof
  • Power semiconductor device and manufacturing method thereof

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Embodiment Construction

[0063] Before explaining the technical solutions provided by the present invention in detail, the technical vocabulary involved in this embodiment will be explained first.

[0064] The power device includes two parts, the device area and the terminal area, wherein the device area realizes the basic functions of the power device, and the terminal area realizes the breakdown voltage of the power device.

[0065] Generally, the terminal region is doped to form a ring to achieve the withstand voltage of the power device, and the doped region opposite to the substrate doping type formed at the edge of the device region is the main junction region, also known as the equipotential ring (similar to the device region Surface equipotential, equivalent to 0V).

[0066] The impurity opposite to the substrate is diffused at the edge of the device region to form the main junction region to form a PN junction (main junction) with the substrate, and a ring with the same doping as the main jun...

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Abstract

A power semiconductor device and its manufacturing method. The power semiconductor device includes: a semiconductor substrate of a first doping type, with a device region on it, and a main junction region of a second doping type and several A field confining ring, the first doping type is opposite to the second doping type; wherein, a semiconductor substrate is formed between the main junction region and the first field confining ring adjacent to the main junction region The first doping region, the doping type of the first doping region is the same as that of the semiconductor substrate, and the doping concentration is higher than that of the semiconductor substrate. In the semiconductor power device, the first doped region between the main junction region and the first field limiting ring increases the surface concentration of the semiconductor substrate between the main junction region and the first field limiting ring. Due to its high electronic potential energy, it can effectively reduce the impact on the electric field caused by the field plate accumulation of mobile charges on the main junction region under high temperature and high pressure conditions.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a power semiconductor device and a manufacturing method thereof. Background technique [0002] The basic requirement of modern power semiconductor devices is to be able to withstand high voltage and high current operation. Among them, the silicon-based power MOSFET usually forms a MOS power semiconductor device with a large aspect ratio by connecting a large number of MOS units in parallel to ensure that the surface voltage between the parallel MOS units in the middle of the large part is roughly the same. However, the voltage between the MOS unit at the boundary (ie terminal) and the surface of the substrate is very different, which often causes the surface electric field to be too concentrated, and due to the curvature effect of the planar junction, the junction bending part of the PN junction at the boundary and the electric field at the surface Increase, causing the e...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/088H01L29/06H01L29/40H01L21/8234H01L21/28
Inventor 钟圣荣王根毅邓小社周宏伟
Owner CSMC TECH FAB2 CO LTD