LTPS TFT, manufacturing method of LTPS TFT, array substrate and display device
A technology of thin-film transistors and low-temperature polysilicon, which is applied in the direction of transistors, semiconductor/solid-state device manufacturing, semiconductor devices, etc., to avoid and reduce adverse effects
Inactive Publication Date: 2015-03-11
BOE TECH GRP CO LTD
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Problems solved by technology
[0006] The technical problem to be solved by the present invention is how to reduce the adverse effect of the hydrogenation process on the formed thin film transistor
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[0033] The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.
[0034] figure 2 It is a flowchart of a method for manufacturing a low-temperature polysilicon thin film transistor provided in an embodiment of the present invention, including:
[0035] S1: sequentially forming an active layer, a gate insulating layer, a gate and an interlayer insulating layer on the base substrate;
[0036] S2: forming the first metal thin film layer;
[0037] S3: performing hydrogenation treatment on the active layer and the gate insulating layer;
[0038] S4: forming a second metal thin film layer, the second metal thin film layer is used to form the pattern of source and drain electrodes.
[0039] Wherein, the material of the first metal thin fil...
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The invention provides an LTPS TFT (Low Temperature Poly-silicon Thin Film Transistor), a manufacturing method of the LTPS TFT, an array substrate and a display device. The manufacturing method of the LTPS TFT comprises the following steps that: S1, an active layer, a grid electrode insulating layer, a grid electrode and an interlayer insulating layer are sequentially formed on a substrate; S2, a first metal thin film layer is formed; S3, the active layer and the grid electrode insulating layer are subjected to hydrogenating treatment; and S4, a second metal thin film layer is formed, wherein the second metal thin film layer is used for forming patterns of source and drain electrodes. Before the active layer and the grid electrode insulating layer are subjected to hydrogenating treatment, the first metal thin film layer is formed above the interlayer insulating layer; after a hydrogenating process, the second metal thin film layer used for forming the source and drain electrodes is manufactured; the adverse influence of the hydrogenating process on resistance of the source and drain electrodes can be avoided; and the features of the formed thin film transistor cannot be influenced, so that the adverse influence of the hydrogenating process on the formed thin film transistor is reduced.
Description
technical field [0001] The invention relates to the display field, in particular to a low-temperature polysilicon thin film transistor, a manufacturing method, an array substrate, and a display device. Background technique [0002] Low Temperature Poly-silicon Thin Film Transistor (LTPS TFT for short) has been widely used in the field of display manufacturing due to its advantages such as high mobility and stability. [0003] The preparation process of the low-temperature polysilicon thin film transistor is generally to form a buffer layer 2' and a polysilicon film on the base substrate 1', and pattern the polysilicon film to form an active layer 3' of the thin film transistor; form a gate on the active layer 3' Insulating layer 4'; forming gate 5' on gate insulating layer 4'; then implanting ions into active layer 3' to form source and drain regions (source region and drain region); deposition covering gate 5' And the interlayer insulating layer (ILD) 6' of the gate insula...
Claims
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Patent Timeline
Login to View More IPC IPC(8): H01L21/336H01L21/28H01L29/786H01L29/417
CPCH01L27/1214H01L29/66757H01L29/78675H01L29/458H01L29/665H01L21/28518H01L21/28568H01L27/1222H01L27/1274H01L29/78618H01L29/78696
Inventor 陆小勇刘政孙亮李小龙龙春平
Owner BOE TECH GRP CO LTD