72 results about "Low-temperature polycrystalline silicon" patented technology

The invention provides an array substrate and a display panel. The array substrate comprises a substrate body and a pixel circuit arranged on the substrate body. The pixel circuit comprises a capacitor and a plurality of thin film transistors. Wherein the plurality of thin film transistors comprise a first transistor and a second transistor which are electrically connected, the first transistor comprises an oxide transistor, the second transistor comprises a low-temperature polycrystalline silicon transistor, and the first transistor is located on the side, away from the substrate, of the grid electrode and the capacitor of the second transistor. The orthographic projection of the first transistor on the substrate is partially overlapped with the orthographic projection of the second transistor on the substrate, and the orthographic projection of the first transistor on the substrate is partially overlapped with the orthographic projection of the capacitor on the substrate. By stacking the first transistor, the second transistor and the capacitor, the occupied space of the pixel circuit can be reduced, and the PPI of the display panel can be improved.

The invention provides a display device and a driving method thereof. The driving method comprises the following steps: timing from the beginning of a vertical blanking period of a frame of picture displayed by the display panel; when timing reaches a preset time point, controlling the power management chip to increase the power voltage of the pixels to be input into the display panel from a first voltage value to a preset voltage value; and after the vertical blanking period is finished, controlling the power supply management chip to restore the power supply voltage from the preset voltage value to the first voltage value. The display device comprises a display panel, a time schedule controller and a power management chip, the time schedule controller is electrically connected with the display panel, and the power management chip is electrically connected with the display panel and the time schedule controller. By dynamically adjusting the power supply voltage of the pixels of the display panel during the vertical blanking period, the display brightness attenuation caused by the leakage current of the low-temperature polycrystalline silicon thin film transistor can be effectively compensated, and the brightness uniformity of a display picture is improved.

The application provides a pixel circuit, a pixel driving method and a display device. The pixel circuit comprises a first initialization circuit and a compensation circuit. The first initialization circuit controls a first initial voltage to be provided to a driving control node under the control of a first initial control signal. The compensation circuit controls a compensation node to be in communication with a first node under the control of a compensation control signal. At least one of the first initialization circuit and the compensation circuit comprises an oxide thin film transistor and a low-temperature polysilicon thin film transistor connected in series with each other.

A display apparatus can include a gate driving circuit, and a pixel circuit including a first oxide transistor, a second oxide transistor, a driving transistor, a first transistor, and an emission element. Also, the driving transistor includes a gate electrode connected to a first node, a source electrode, and a drain electrode, the first oxide transistor and the second oxide transistor are connected to the first node, the first transistor is connected to a second node, the second node connected to any one of the source electrode and the drain electrode of the driving transistor, the driving transistor and the first transistor include a low temperature polycrystalline silicon (LTPS), a first region of the gate driving circuit is on a first side of an active area including the pixel circuit, and a second region of the gate driving circuit is disposed on a second side of the active area.

A display substrate is provided to include a base substrate and: a first transistor layer including a first active layer and a second transistor layer including a second active layer sequentially along a direction away from the base substrate; the first and second active layers are provided with at least one insulating layer therebetween, and are made of low-temperature polysilicon materials; the first active layer includes first channel region(s) and first source-drain doped region(s); the second active layer includes second channel region(s) and second source-drain doped region(s); orthographic projections of a second source-drain doped region and a first source-drain doped region on the base substrate overlap with each other; and a second source-drain doped region is connected to a first source-drain doped region through a connecting part filled in a corresponding first via in the insulating layer. A method for manufacturing a display substrate and a display apparatus are provided.

A display substrate and a display device are provided. The display substrate includes: a base substrate, and a low temperature poly-silicon thin film transistor and a metal oxide thin film transistor on the base substrate; the low temperature poly-silicon thin film transistor includes: a low temperature poly-silicon semiconductor layer, a first gate insulating layer, a first gate electrode, a first interlayer insulating layer, a first source electrode, and a first drain electrode; the metal oxide thin film transistor includes: a metal oxide semiconductor layer, a second gate insulating layer, a second gate electrode, a second interlayer insulating layer, a passivation layer, a second source electrode, and a second drain electrode; and the second drain electrode is on a side of the metal oxide semiconductor layer away from the base substrate.

A display panel includes a pixel driving circuit, where the pixel driving circuit includes a driving transistor (T3) and a first transistor (T1), a first electrode of the first transistor (T1) is connected to a gate of the driving transistor (T3), a second electrode thereof is connected to a first initial signal line (Vinit1), the driving transistor (T3) is a P-type low temperature polysilicon transistor, and the first transistor (T1) is an N-type oxide transistor. The display panel further includes: a base substrate, a second conductive layer, a second active layer, a third conductive layer, and a fourth conductive layer.

Embodiments of the present disclosure provide a display substrate and a display device. The display substrate includes a base substrate, a driving circuit layer on the base substrate, a light-emitting structure layer on a side of the driving circuit layer away from the base substrate, and a shield electrode layer on a side of the driving circuit layer proximal to the base substrate. The light-emitting structure layer includes a plurality of light-emitting devices. The driving circuit layer includes a plurality of pixel driving circuits. At least part of transistors in each of the pixel driving circuits are oxide thin film transistors, and at least part of transistors are low-temperature polycrystalline silicon thin film transistors.

The present invention provides a display substrate, a manufacturing method thereof, a driving method thereof, and a display device. The display substrate comprises: a base substrate, a plurality of photodetection units and a plurality of luminous sub-pixels located in a display area of ​​the base substrate, wherein the orthographic projections of the photodetection units on the base substrate and the orthographic projections of the luminous sub-pixels on the base substrate do not overlap with each other; the photodetection units comprise a photodetector and an acquisition control circuit for controlling the photodetector to acquire texture data; the luminous sub-pixels comprise a light-emitting device and a pixel driving circuit for driving the light-emitting device to emit light, wherein the active layer of the driving transistor in the pixel driving circuit is a low-temperature polysilicon material, the active layers of at least some of the transistors other than the driving transistor in the pixel driving circuit are a metal oxide semiconductor material, and at least one film layer of the active layer of each transistor in at least some of the transistors is arranged in the same layer and material as the active layer of the transistor in the acquisition control circuit.

The invention discloses an LTPO display panel and a display device. The LTPO display panel comprises a substrate, a buffer layer, a first low-temperature polycrystalline silicon thin film transistor, a second low-temperature polycrystalline silicon thin film transistor and an oxide thin film transistor, each of the first low-temperature polycrystalline silicon thin film transistor and the second low-temperature polycrystalline silicon thin film transistor comprises a low-temperature polycrystalline silicon layer, a first gate insulating layer and a first gate layer which are stacked; the first low-temperature polycrystalline silicon thin film transistor and the second low-temperature polycrystalline silicon thin film transistor are covered with a second gate insulating layer, and at least part of the second gate insulating layer is covered with a second gate layer; the oxide thin film transistor is located above the first low-temperature polycrystalline silicon thin film transistor and / or above the second grid electrode layer. The first low-temperature polycrystalline silicon thin film transistor is of a top gate structure and can serve as a barrier layer, hydrogen ions on the low-temperature polycrystalline silicon thin film transistor are prevented from diffusing to a channel region of the oxide thin film transistor, and the stability of the oxide thin film transistor is improved.

The invention relates to the technical field of super-large-scale integrated circuit manufacturing in the semiconductor industry, and particularly provides a low-temperature polycrystalline silicon thin film transistor, a display panel and a preparation method. The method aims at solving the problems that in the prior art, an optimization method for interface defects is still high in process complexity, cost is increased or the effect is limited. Therefore, the invention provides a preparation method of a low-temperature polycrystalline silicon thin film transistor, which comprises the following steps of: forming an amorphous silicon layer on a substrate; forming a silicon oxide layer on the amorphous silicon layer; laser annealing is carried out, so that the amorphous silicon layer is converted into a polycrystalline silicon layer, the polycrystalline silicon layer is used for forming a channel region and an electrode contact region of the low-temperature polycrystalline silicon thin film transistor, and the thickness of the silicon oxide layer is configured to be capable of inhibiting the height of protrusions formed when the amorphous silicon layer is converted into the polycrystalline silicon layer. According to the method, the protruding height of the polycrystalline silicon layer is reduced, the interface defects of polycrystalline silicon and GI are optimized, and the problems of residual images and the like caused by accumulation of the interface defects are solved.

A display panel and a display device are provided. The display panel includes a display area and a signal detection module. The display area includes a plurality of pixel areas. One pixel area includes at least one pixel and a monitoring unit. The monitoring unit includes a conductive unit. The conductive unit includes a low-temperature polysilicon material; and / or the monitoring unit includes a first driving circuit. The first driving circuit includes at least one low-temperature polysilicon transistor. The signal detection module is used to detect a signal on at least one terminal of the monitoring unit.

The present invention relates to an array substrate, comprising: a base substrate, which is provided with a first area and a second area, which are parallel to each other; a first transistor, which is located in the first area and is provided with a first active layer, wherein the first active layer is low-temperature polycrystalline silicon; a second transistor, which is located in the second area and is provided with a second active layer, wherein the second active layer is a metal oxide semiconductor; a first light-shielding layer, which is arranged right below the second active layer, wherein at least an interlayer dielectric layer is provided between the first light-shielding layer and the second active layer; and a second light-shielding layer, which is arranged right above the second active layer, wherein a planarization layer and a fifth insulating layer are provided between the second light-shielding layer and the second active layer. The present invention also relates to a method for preparing the array substrate. The present invention also relates to a display apparatus, comprising the array substrate.

A display apparatus includes a substrate having a first substrate, a second substrate, and an inorganic insulating layer between the first substrate and the second substrate. A first buffer layer is on the substrate, wherein the first buffer layer includes n+1 layers, and ‘n’ is 0 or an even number. A first thin film transistor, a second thin film transistor, and a storage capacitor are each on the first buffer layer. The first thin film transistor includes a first active layer formed of a low temperature poly silicon material. The second thin film transistor includes a second active layer formed of an oxide semiconductor material. The storage capacitor includes a first capacitor electrode and a second capacitor electrode.

An integrated circuit (IC) comprises a p-type thin film transistor (TFT) 210 on an insulating substrate 203 such as polyimide or glass, having a channel region 201 formed from at least partially cryst

A display panel and a display apparatus are provided. In the display panel, a first electrode of the threshold compensation transistor is connected to a first electrode of the driving transistor, a second electrode of the threshold compensation transistor is connected to a gate electrode of the driving transistor, and the data writing transistor is connected to a second electrode of the driving transistor, a material of an active layer of the threshold compensation transistor includes low-temperature poly-silicon, the gate line and the scan line are arranged along a second direction, the second direction intersects with the first direction, the gate line is different from the scan line, an active layer of the data writing transistor is located on a side of an active layer of the driving transistor away from the active layer of the threshold compensation transistor in the second direction.

A pixel includes a pixel circuit and an organic light emitting diode. The pixel circuit has first, second, third, and fourth transistors. The first transistor controls an amount of current flowing from a first driving power supply coupled to a first node to a second driving power supply through the organic light emitting diode. The turns on when a scan signal is supplied to a first scan line. The third transistor turns on when a scan signal is supplied to a second scan line. The fourth transistor turns on when a scan signal is supplied to a third scan line. The first transistor is a p-type Low Temperature Poly-Silicon thin film transistor and the third transistor and the fourth transistor are n-type oxide semiconductor thin film transistors.

The embodiment of the present application provides an array substrate, a manufacturing method and a display device, wherein the array substrate includes a first region and a second region adjacent to each other, wherein a first low-temperature polysilicon layer, an intermediate film layer and a second low-temperature polysilicon layer are stacked along a first direction in the first region; a support column is provided between the first low-temperature polysilicon layer and the base substrate in the second region, the portion of the first low-temperature polysilicon layer lifted by the support column includes a first connection portion, and the second low-temperature polysilicon layer includes a second connection portion located in the second region and connected to the first connection portion; the extension distance of the second connection portion along the first direction is less than the spacing between the first low-temperature polysilicon layer and the second low-temperature polysilicon layer in the first region. With such a design, the depth of the via hole can be reduced or even directly connected after the via hole is omitted, so that the second low-temperature polysilicon layer absorbs more laser energy during the laser irradiation of the ELA device during the manufacturing process, thereby improving the crystallization quality; and after being conductively converted, the resistance is guaranteed to be normal, thereby improving the product yield.

The embodiment of the invention discloses a display substrate and a display device, which are characterized in that a low-temperature polycrystalline silicon transistor, an oxide transistor, a storage capacitor and a first voltage input bonding pad in a pixel driving circuit manufactured by adopting an LTPO technology are integrated on two sides of a flexible substrate to form a vertically stacked driving back plate structure; therefore, the area occupied by the pixel driving circuit can be reduced, the pixel density is improved, and the high-resolution LTPO driving backboard structure is realized. Moreover, the first polar plate of the storage capacitor is electrically connected with the first voltage input bonding pad through the first via hole penetrating through the flexible substrate, so that the storage capacitor is placed in the first via hole of the flexible substrate, the area of the storage capacitor is increased through the depth of the first via hole of the flexible substrate, and a vertical capacitor is formed. The area of the storage capacitor can be increased in a limited layout space, so that the performance of the LTPO driving backboard is improved.

A display panel, which includes a display area (AA) and a non-display area (NA), wherein a first active layer (123) of the display area (AA) includes low-temperature polysilicon transistors, and a second active layer (127) thereof includes metal oxide transistors; and each of gate driving units (200a) of the non-display area (NA) includes a plurality of gate transistors and a storage capacitor (Cst1) connected to the gate transistors, active parts of the gate transistors and one electrode plate of the storage capacitor (Cst1) being located in mutually different ones of the first active layer (123) and the second active layer (127).

An integrated circuit (IC) comprises a p-type thin film transistor (TFT) 210 on an insulating substrate 203 such as polyimide or glass, having a channel region 201 formed from at least partially crystalline silicon. The partially crystalline silicon may comprise low temperature polycrystalline silicon (LTPS) formed by laser annealing of amorphous silicon while maintaining the substrate below 650 °C. The integrated circuit may further comprise an n-type TFT 211 having a channel region 202 formed from semiconducting oxide material such as indium gallium zinc oxide (IGZO), forming a complementary metal-oxide semiconductor (CMOS) integrated circuit such as an inverter circuit. The LTPS exhibits a charge carrier mobility within the range between 1 to 40 cm2 / V.s and may be formed to have a carrier mobility to be close to that of the channel region of the n-type TFT to allow complementary p-type and n-type TFTs. A semiconductor-insulator-metal capacitor (SIMCap) (Fig. 3F: 311) or resistor (Fig. 1F: 111) may be formed in conjunction with the p-type TFT. The gate dielectric materials and thicknesses of p-type and n-type TFTs may be different, allowing independent control. The channel lengths may be different to offset differences in carrier mobilities, parasitic capacitances and gate insulator capacitances.

A display panel and a display apparatus are provided. In the display panel, a first electrode of the threshold compensation transistor is connected to a first electrode of the driving transistor, a second electrode of the threshold compensation transistor is connected to a gate electrode of the driving transistor, and the data writing transistor is connected to a second electrode of the driving transistor, a material of an active layer of the threshold compensation transistor includes low-temperature poly-silicon, the gate line and the scan line are arranged along a second direction, the second direction intersects with the first direction, the gate line is different from the scan line, an active layer of the data writing transistor is located on a side of an active layer of the driving transistor away from the active layer of the threshold compensation transistor in the second direction.

This utility model proposes a curved luminous screen for vehicle instrument panels, including an instrument body, which comprises an instrument shell, a mounting plate, and an OLED self-emissive screen. The mounting plate has a mounting cavity, and a control component is disposed between the mounting plate and the instrument shell. A glass cover is disposed on the mounting plate. The OLED self-emissive screen includes a liquid crystal display module, which comprises a polarizing film, a glass encapsulation layer, a low-temperature polycrystalline silicon layer, and a graphite sheet layer arranged sequentially. The use of an OLED self-emissive screen in the vehicle instrument panel only requires power to the illuminated pixels, resulting in 40%-50% lower power consumption than LCD. This is particularly suitable for extending the range of new energy vehicles. Furthermore, the self-emissive nature of OLED pixels allows for a contrast ratio of up to one million to one, with near-pure black, reducing light pollution, especially during nighttime driving, and improving the readability of instrument information. OLED covers the DCI-P3 wide color gamut, with superior color saturation and reproduction compared to LCD, making warning icons, navigation maps, and other details on the instrument panel clearer.

The application discloses a display panel and a display device. The display panel comprises a first transistor and a second transistor which are electrically connected, the first transistor comprises a first active part formed by low-temperature polysilicon material, and the second transistor comprises a second gate and a second active part formed by metal oxide material; the display panel further comprises a substrate, the first active part is arranged on the substrate; the second active part is located on a side of the first active part away from the substrate; the second gate is located on a side of the second active part away from the first active part; and a normal projection of the second active part on the substrate and a normal projection of the first active part on the substrate at least partially overlap. The application can improve the space utilization and resolution of the display panel.

The present disclosure provides a display substrate, a manufacturing method thereof and a display apparatus. The display substrate includes a base substrate, an active structure layer disposed on the base substrate and a source-drain structure layer disposed on the active structure layer. The active structure layer includes a first active layer and a second active layer. A material of the first active layer includes low-temperature polysilicon and a material of the second active layer includes oxide semiconductors. The source-drain structure layer includes a first source-drain electrode and a second source-drain electrode, wherein the first source-drain electrode overlaps with a first side surface of the first active layer through a first via hole and the second source-drain electrode overlaps with a second side surface of the second active layer through a second via hole.

A display panel can include a circuit layer disposed on a flexible substrate, the circuit layer including a plurality of oxide thin film transistors (oxide TFTs) and / or a plurality of low temperature polysilicon thin film transistors (LTPS TFTs), a light-emitting element layer disposed on the circuit layer, the light-emitting element layer including a plurality of light-emitting elements, an encapsulation layer configured to cover the light-emitting element layer, a touch sensor layer disposed on the encapsulation layer, and a color filter layer disposed on the touch sensor layer. Also, the flexible substrate includes a display area and a non-display area, the circuit layer includes a gate driver disposed on at least one of sides of the non-display area, and each of the light-emitting elements includes an anode electrode, an organic compound layer, and a cathode electrode.

The invention discloses a high-transmittance OLED display panel for under-screen fingerprint identification and a preparation method thereof. The high-transmittance OLED display panel comprises a substrate; sequentially forming a buffer layer, a low-temperature polycrystalline silicon layer, a gate insulation layer, a gate layer, an interlayer insulation layer, a source and drain electrode layer, a flat layer, an anode layer, a pixel definition layer, a spacer layer, a light-emitting layer, a cathode layer, a packaging layer, a touch layer and a reflection reduction layer on the substrate; an oxide semiconductor layer is arranged between the gate insulating layer and the gate layer, and the source-drain electrode layer is connected with the oxide semiconductor layer and the low-temperature polycrystalline silicon layer; the anode layer is connected with the source-drain electrode layer; the pixel definition layer and the spacer layer are respectively connected with the anode layer; the light-emitting layer at least partially covers the anode layer; the cathode layer at least partially covers the light-emitting layer, the pixel definition layer and the spacer layer. According to the OLED display panel, except for the driving TFT, the other TFTs are oxide semiconductors, and the transmittance of the oxide semiconductors is far higher than that of low-temperature polycrystalline silicon, so that the transmittance of the OLED display panel is improved.

The invention discloses a pixel circuit and a driving method thereof. The pixel circuit comprises a driving module, a coupling module, a compensation module and a voltage writing module, the first end of the compensation module is connected with the first end of the driving module, the second end of the compensation module is connected with the control end of the driving module, and the compensation module is used for transmitting threshold voltage information of the driving module to the driving module; the coupling module is connected between the voltage write-in module and the first end of the driving module and is used for transmitting a first initialization voltage and a data voltage to the coupling module in a time-sharing manner; the coupling module is used for coupling the voltage containing the data voltage to the control end of the driving module. Transistors included in the driving module and transistors included in the compensation module are oxide transistors, and at least one of the at least two transistors included in the voltage writing module is a low-temperature polycrystalline silicon transistor. The pixel circuit comprises an oxide transistor and a low-temperature polycrystalline silicon transistor, and display uniformity and low power consumption of a screen body are both considered.

The invention provides a display device of a hybrid thin film transistor, which belongs to the technical field of display, and comprises a plurality of thin film transistors formed on the same semiconductor substrate, the thin film transistors comprise a first thin film transistor and a second thin film transistor, the first thin film transistor is a low-temperature polycrystalline silicon thin film transistor, and the second thin film transistor is a low-temperature polycrystalline silicon thin film transistor. The second thin film transistor is an oxide semiconductor thin film transistor; the shielding layer is located below the active layer of the first thin film transistor and on the projection perpendicular to the semiconductor substrate, and the shielding layer at least partially covers the active layer of the first thin film transistor and completely covers the channel region of the first thin film transistor; and the shading layer is located below the active layer of the second thin film transistor and on the projection perpendicular to the semiconductor substrate, and the shading layer at least completely covers the active layer of the second thin film transistor. The invention has the beneficial effects that the advantages of the low-temperature polycrystalline silicon thin film transistor and the oxide semiconductor thin film transistor are fully combined, the display effect is ensured while low power consumption is realized, and the device reliability is improved.

A pixel may include a micro LED, a pulse width modulation (PWM) adjustment circuit that includes an inverter, and controls a light emission period of the micro LED on the basis of an output of the inverter according to a data voltage which is provided to an input terminal of the inverter and a duty driving signal, and a constant current (CC) generating circuit that provides a constant current to the micro LED for the light emission period. The inverter may be implemented with low-temperature polycrystalline silicon and oxide thin-film transistors (LTPO TFTs).