Production method for low-temperature polycrystalline silicon thin film

A technology of low-temperature polysilicon and its manufacturing method, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as large leakage current, affecting product quality, uneven surface of polysilicon layer 105, etc., to improve product quality, Effect of Reducing Leakage Current

Inactive Publication Date: 2012-09-05
BOE TECH GRP CO LTD
View PDF5 Cites 33 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Specifically, such as figure 1 As shown, a buffer layer 106 is formed on the substrate 101, and an amorphous silicon layer is formed on the buffer layer 106. After using ELA, the amorphous silicon layer is crystallized into a polysilicon layer 105, but the inventors have found that due to the ELA process Complicated, the amorphous silicon layer cannot be completely crystallized into a polysilicon layer, so that the surface of the formed polysilicon layer 105 is uneven and has many protrusions 104, so that when a voltage is applied to the thin film transistor, the protrusions on the surface of the polysilicon film will cause a tip discharge phenomenon , resulting in a large leakage current, and also due to the rough surface of the polysilicon film, resulting in a large resistance, making the mobility and threshold voltage of the polysilicon film uneven, affecting product quality

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Production method for low-temperature polycrystalline silicon thin film
  • Production method for low-temperature polycrystalline silicon thin film
  • Production method for low-temperature polycrystalline silicon thin film

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0020] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0021] A method for manufacturing a low-temperature polysilicon thin film provided in an embodiment of the present invention, such as figure 2 shown, including:

[0022] S201, sequentially depositing a buffer layer and an amorphous silicon layer on a substrate.

[0023] Specifically, such as image 3 As shown, a buffer layer 306 is deposited on the cleaned substrate 301, the buffer layer is composed of silicon nitride (SiN x ) layer 302 and silicon dioxide...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
Login to view more

Abstract

The embodiment of the invention provides a production method for a low-temperature polycrystalline silicon thin film, relating to the field of manufacturing for a liquid crystal panel, and used for reducing the leakage current generated by the polycrystalline silicon thin film during a use process, and thus improving product quality. The production method for a low-temperature polycrystalline silicon thin film comprises the following steps of: sequentially depositing a buffering layer and an amorphous silicon layer on a substrate; performing high-temperature heating on the amorphous silicon layer, and performing excimer laser annealing on the amorphous silicon layer to form a polycrystalline silicon layer; oxidizing the polycrystalline silicon layer at a high temperature; and etching the oxidized polycrystalline silicon layer to form the polycrystalline silicon thin film. The production method provided by the embodiment of the invention is used for manufacturing a thin-film transistor.

Description

technical field [0001] The invention relates to the field of liquid crystal panel manufacture, in particular to a method for manufacturing a low-temperature polysilicon thin film. Background technique [0002] In the manufacturing process of the display, the formation of the polysilicon thin film of the active layer of the thin film transistor in the array substrate needs to be carried out at high temperature. Since the heat resistance of the general substrate is very low, if the polysilicon thin film is directly formed at high temperature, it will cause The substrate is deformed. Therefore, a low temperature polysilicon thin film (Low Temperature Polysilicon Thin Film) is usually used when making an active layer of a thin film transistor. [0003] Excimer Laser Annealing (Excimer Laser Annealing, can be abbreviated as ELA) method is currently the main method for producing low-temperature polysilicon thin films to achieve mass production. It uses high-energy excimer laser t...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/324H01L21/20
CPCH01L21/02436H01L21/02532H01L21/02664H01L21/02686H01L21/32115H01L27/1285H01L21/02595H01L21/02675
Inventor 田雪雁龙春平姚江峰
Owner BOE TECH GRP CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products