11 results about "Polycrystalline silicon thin films" patented technology

Provided are abrasive grains and a composition for chemical mechanical polishing which are for selectively polishing a silicon nitride film, and which are applicable not only to silicon oxide films but also to amorphous silicon films and polysilicon films. This method for manufacturing abrasive grains includes: a first step of heating a mixture which contains particles having a sulfanyl group (—SH) fixed to the surface thereof via covalent bonds, and which contains a compound having carbon-carbon unsaturated double bonds; and a second step, which is performed after the first step, of further adding a peroxide and carrying out heating.

This invention provides a stacked structure for selective contact, a front-side battery structure, and a fabrication method. The stacked structure includes a dielectric layer, a first heavily doped polysilicon layer, and an etch-resistant layer sequentially stacked on the front side of a substrate. A second heavily doped polysilicon layer is disposed on the etch-resistant layer in the region corresponding to the front-side metal electrode. This stacked structure solves the problem of difficult-to-control etching process by adding an etch-resistant layer, thereby enabling a fabrication process that allows for the full deposition of polysilicon thin films, the formation of locally patterned protective regions, and the etching away of the remaining unpatterned polysilicon thin films. This allows for the application of an ultrathin silicon oxide / heavily doped polysilicon structure to the front side of the battery, passivating the contact between the metal electrode and the silicon substrate, avoiding the existence of high recombination regions, reducing carrier recombination, and maintaining carrier collection efficiency, ultimately improving the battery's open-circuit voltage, fill factor, and conversion efficiency.

The application discloses a P-type TOPCon cell and a preparation method thereof. The P-type TOPCon cell takes P-type crystalline silicon as a substrate, and the front surface of the P-type TOPCon cell comprises, from inside to outside, a tunneling oxide layer, a phosphorus-doped polysilicon stack and a front composite passivation layer. The phosphorus-doped polysilicon stack comprises, from inside to outside, a first phosphorus-doped polysilicon film, a first silicon oxide film, a second phosphorus-doped polysilicon film, a second silicon oxide film and a third phosphorus-doped polysilicon film. The phosphorus doping concentration and the thickness of the third phosphorus-doped polysilicon film are greater than those of the first phosphorus-doped polysilicon film. The preparation method comprises preparing the tunneling oxide layer, the phosphorus-doped polysilicon stack and the front composite passivation layer on the front surface of the P-type crystalline silicon. The P-type TOPCon cell has the advantages of excellent anti-space radiation capability, high conversion efficiency, long service life and the like. As a novel solar cell with excellent performance, the P-type TOPCon cell can adapt to a harsh space environment and meet the demand of modern spacecraft for high-performance power supplies.

This technology provides a way to easily remove the gettering layer. [Solution] A processing method according to one aspect of the present disclosure comprises: preparing a substrate having a polycrystalline silicon film containing a catalyst metal on its surface; forming a gettering layer on the polycrystalline silicon film; and annealing the substrate to diffuse the catalyst metal contained in the polycrystalline silicon film into the gettering layer, wherein the gettering layer is formed of amorphous silicon germanium containing impurities that enable the diffusion of the catalyst metal into the gettering layer.

To provide a semiconductor device capable of preventing a contact barrier metal film from peeling off from the trench gate lead-out electrode. In the gate wiring lead-out region MGR defined on a semiconductor substrate, a convex portion is formed on the trench gate lead-out electrode TGI, extending towards a gate lead-out contact member. The convex portion is formed by a natural oxidation film and a polysilicon film PSF. The gate lead-out contact member is formed to cover the convex portion by interposing the contact barrier metal film.

A processing method according to one embodiment of the present disclosure comprises: preparing a substrate that has a catalyst-metal-containing polycrystalline silicon film on the surface thereof; forming a gettering layer formed of amorphous silicon on the polycrystalline silicon film through chemical vapor deposition using an organoaminosilane gas; and annealing the substrate to diffuse the catalyst metal contained in the polycrystalline silicon film into the gettering layer.

This application discloses an array substrate and a display panel. The array substrate includes an open region and a non-open region located on at least one side of the open region. The array substrate also includes a substrate, a buffer layer, and a polycrystalline silicon thin-film transistor. The buffer layer is disposed on the substrate and includes a first silicon oxide layer and a first silicon nitride layer sequentially stacked on the substrate. The first silicon oxide layer is located in both the non-open region and the open region, and the first silicon nitride layer is located in the non-open region. The polycrystalline silicon thin-film transistor is located in the non-open region and includes a polycrystalline silicon semiconductor layer disposed on the first silicon nitride layer. In the first silicon nitride layer, the number of silicon-hydrogen bonds per cubic centimeter is 1.0 × 10⁻⁶. 21 Up to 1.0×10 23 Within the specified range. This application can improve the transmittance of the array substrate opening region while simultaneously replenishing hydrogen to the polycrystalline silicon semiconductor device in the non-opening region.

The present disclosure provides an excimer laser annealing device and a method for preparing a polysilicon film. The device comprises: a substrate support for carrying a substrate to be processed; a laser unit for emitting a laser beam to a carrying surface of the substrate support, and the laser beam has an extension length along a first direction, and the first direction is parallel to the substrate to be processed; the substrate to be processed comprises a first side edge and a second side edge arranged adjacently, and the substrate to be processed is arranged on the substrate support in a manner that the first side edge is inclined to a reference direction, and the reference direction is perpendicular to the first direction and parallel to a plane defined by the first direction and the substrate to be processed; and the substrate support is capable of moving relative to the laser beam along a second direction, and the second direction is a vector direction inclined to both the first direction and the reference direction. The excimer laser annealing device and the method for preparing a polysilicon film can improve the utilization rate of the substrate.

A processing method according to one aspect of the present disclosure comprises: preparing a substrate comprising, on a surface thereof, a polycrystalline silicon film containing a catalyst metal; forming a gettering layer on the polycrystalline silicon film; and diffusing the catalyst metal contained in the polycrystalline silicon film into the gettering layer by annealing the substrate. The gettering layer is formed of amorphous silicon germanium containing an impurity that enables diffusion of the catalyst metal into the gettering layer.

This technology provides a way to reduce the diffusion of elements originating from the gettering layer into the polycrystalline silicon film. [Solution] A processing method according to one aspect of the present disclosure comprises: preparing a substrate having a polycrystalline silicon film containing a catalyst metal on its surface; forming a gettering layer made of amorphous silicon on the polycrystalline silicon film by chemical vapor deposition using organic aminosilane gas; and diffusing the catalyst metal contained in the polycrystalline silicon film into the gettering layer by annealing the substrate.

The application provides a manufacturing method of LPCVD in-situ doped polysilicon film, and a furnace tube for LPCVD in-situ doped polysilicon. The cavity in the furnace tube is provided with a plurality of slots, and the distance between the slots is less than or equal to a target distance. A substrate is arranged on the crystal boat. The pressure in the cavity is adjusted to 0.6-0.8 Torr, and the temperature is adjusted to 560-580 DEG C. Then, silane and phosphine are introduced into the cavity to form a doped first polysilicon film layer on the substrate. The pressure in the cavity is adjusted to 0.2-0.4 Torr, and the temperature is adjusted to 560-580 DEG C. Then, silane and phosphine are introduced into the cavity to form a doped second polysilicon film layer on the first polysilicon film layer, so that the number of defects on the first and second polysilicon film layers is less than a target number. The application can reduce the process defects of the LPCVD in-situ doped polysilicon furnace tube when a crystal boat with more slots and smaller slot distance is used.