72results about How to "Reduce peak power consumption" patented technology

The invention provides solar panel systems, which may be applied to surfaces such as residential rooftops. The invention also provides methods of installing solar panel systems. A solar panel system may comprise one or more module, which may comprise one or more solar panels and a rack. A solar panel may comprise a polymer, and may not comprise glass or a metal frame. The rack may include three footings and a plurality of adjustable fasteners that may enable the module to reside on an uneven surface. The rack may also include integrated electronic components and a microinverter. A module may yield a desired power output, and may generate performance monitoring data.

A method and apparatus for inserting design-for-debug (DFD) circuitries in an integrated circuit to debug or diagnose DFT modules, including scan cores, memory BIST (built-in self-test) cores, logic BIST cores, and functional cores. The invention further comprises using a DFD controller for executing a plurality of DFD commands to debug or diagnosis the DFT modules embedded with the DFD circuitries. When used alone or combined together, these DFD commands will detect or locate physical failures in the DFT modules in the integrated circuit on an evaluation board or system using a low-cost DFT debugger. A computer-aided design (CAD) method is further developed to synthesize the DFD controller and DFD circuitries according to the IEEE 1149.1 Boundary-scan Std. The DFD controller supports, but is not limited to, the following DFD commands: RUN_SCAN, RUN_MBIST, RUN_LBIST, DBG_SCAN, DBG_MBIST, DBG_LBIST, DBG_FUNCTION, SELECT, SHIFT, SHIFT_CHAIN, CAPTURE, RESET, BREAK, RUN, STEP, and STOP.

The invention discloses an energy optimizing dispatching method of a home hybrid power supply system in a real-time power price environment. The energy optimizing dispatching method comprises the steps of establishing a flexible load working model according to a linear inequality constraint condition, obtaining electric energy matching between DG (distributed generation) and a load by use of a genetic algorithm (GA), performing automatic optimization by use of the information of the DG and the RTP (Real Time Price) and arranging the flexible load to operate at a lowest-price moment, developing a charge/discharge policy of an energy storage device to realize the energy re-planning of the DG, thereby satisfying the balance between supply and demand of the DG and the load, and finally, making up the difference between supply and demand in such a manner of supplying power to a storage battery or the load from a large power grid and reducing the power purchase cost to an utmost extent. The energy optimizing dispatching method of the home hybrid power supply system in the real-time power price environment provides detailed algorithm description for an actual smart home user as a test object; besides, the effectiveness of the developed policy in improving the utilization rate of the electric energy of the DG and the economic benefit of the user is proven through a series of experiments.

A source signal is provided. The source signal is XORed with a scrambling random signal to generate a scrambled signal. The scrambled signal is transmitted through the digital logic circuit. The scrambled signal is XORed with the descrambling random signal logically identical to the scrambling random signal to produce a descrambled signal identical to the source signal. In one embodiment, the scrambling random signal is transmitted through the digital logic circuit and used as the descrambling random signal. In another embodiment, the scrambling random signal and descrambling random signal are generated independently using pseudo-random number generators. In yet another embodiment, the scrambling random signal is self-synchronizing and is contained within the pattern of the scrambled signal.

An integrated microfluidic device having a number of chambers (11-MN) for heating a fluid, a number of electrical heating elements (R) for heating different ones of the chambers, a controller for controlling the heating elements to vary a temperature of the fluid in the chambers repeatedly through a cycle of different temperatures, the controller being arranged to time the temperature cycle for a given one of the chambers to be out of phase with temperature cycles of others of the chambers. This can help reduce peak power consumption, and thus reduce unwanted voltage drops on supply lines. These can cause loss of precision in heating and sensing circuits. The device can comprise a low temperature polysilicon on a glass substrate. The controller can be coupled to the heating elements using an active matrix of control lines and switches (T2).

A non-volatile memory with multiple memory dice manages simultaneous operations so as to not exceed a system power capacity. A load signal bus is pulled up with a strength proportional to the system power capacity. Each die has a driver to pull down the bus by an amount corresponding to its degree of power need as estimated by a state machine of the die. The bus therefore provides a load signal that serves as arbitration between the system power capacity and the cumulative loads of the individual dice. The load signal is therefore at a high state when the system power capacity is not exceeded; otherwise it is at a low state. When a die wishes to perform an operation and requests a certain amount of power, it drives the bus accordingly and its state machine either proceeds with the operation or not, depending on the load signal.

An energy saving defrost control system for reducing power consumption of an electromechanically controlled refrigerator is provided. The system includes a defrost timer adapted to control a compressor according to an established run time, a defrost heater control operatively connected to the defrost timer and configured to activate a defrost heater in response to a timeout by the defrost timer, a DSM module responsive to demand state signals from an associated utility indicative of at least a peak demand and off peak demand state, and a time delay latching relay having a timer and configured to switch to one of a low position and a high position based on the demand state signal.

The invention relates to a method for reducing power consumption of an integrated circuit system of an Ethernet passive optical network physical layer and designs a device for reducing power consumption of I/O (input/output) unit of an integrated circuit. The device is used as a module capable of being integrated into a physical layer integrated circuit. The method includes: encoding data before parallel binary data are transmitted to an I/O interface, computing the number of binary bits changed in two group data in adjacent clock period, turning and setting a zone bit as 1 if the number of changed bits is large; judging whether the data are turned or not according to the zone bits and turning and decoding according to the bits; dividing binary data into multiple sections for parallel I/O with wider bit width, and encoding and decoding the multiple sections; caching n data with bit width of m, grouping the n data and arranging n zone bits into data with bit width of m, and utilizing m-n binary bits without zone bits for checking, wherein the data are used a key frame.

The invention discloses a charge pump circuit of an EEPROM (Electrically Erasable Programmable Read-Only Memory) used for a passive UHF RFID (Ultra High Frequency Radio Frequency Identification Device) chip, which mainly solves the problem that the power consumption is overlarge during the charging period of the charge pump circuit of a conventional EEPROM. The charge pump circuit consists of a bi-phase non-overlapping clock generating circuit (201), a digital circuit (202), a control logic circuit (203) and a main charge pump (204), wherein the bi-phase non-overlapping clock generating circuit, the digital circuit and the control logic circuit convert input signals into n+2 bit clock signals which are fed into a main charge pump, the minus end of a capacitor C of an odd level unit of the charge pump is connected with a clk_bar; the minus end of a capacitor C of an even level unit of the charge pump is connected with clock control signals clk_2, clk_4,..., and clk_2n; and the minus end of an output level capacitor CL is connected with clock signals clk-L; an ith clock signal clk_2i delays for delta t compared with an i-1 clock signal clk_2, wherein i=1, 2,..., n, and then the effective clock signals are output, so that during the charging period, all the capacitors are charged simultaneously, and the charge pump circuit has the advantages of low power consumption during the charging period.

A microwave oven comprises a cooking cavity and a RF generation module configured to deliver microwave energy into the cooking cavity. A controller receives and processes a signal indicative of the current state of an associated energy supplying utility for determining whether to operate the microwave oven in one of a normal operating mode and a power saving mode in response to the received signal. A power source is operatively associated with the controller and the RF generation module, and is configured to receive a signal from the controller and cause the microwave oven to operate in normal operating mode or in power saving operating mode in accord with the signal.

A system for reducing the peak power consumption in an electromechanically controlled refrigerator is provided. The system comprises a cold control device including a housing and a counter spring having at least one spring tension position corresponding to a temperature set point, a bourdon tube having a first end comprising an elastomeric diaphragm operatively associated with the counter spring, and a second end, opposite the first end, located in the compartment, wherein the counter spring is capable of providing a force against the diaphragm, and a DSM switching device operatively controlled by an associated DSM module. The DSM module is configured to receive a signal indicative of at least one of a peak or non-peak demand period of an associated utility.

A sensor for ultrasonically measuring a portion of a structure, the sensor comprising: a transducer for converting an analog transmit signal to an ultrasonic transmit signal, and for converting an ultrasonic reflected signal to an analog reflected signal; a housing integrated with the transducer and containing at least: a processor; a wireless data transmitter for transmitting wirelessly a data signal from the processor; a transmit and receive circuit for transmitting an analog transmit signal to the transducer in response to a transmit trigger from the processor, and for receiving an analog reflected signal from the transducer; an A/D converter for digitizing only a portion of the analog reflected signal in response to a sample trigger from the processor; a battery to supply power to the processor, the wireless data transmitter, the transmit and receive circuit, and the A/D converter; memory operatively connected to the processor and configured to instruct the processor to execute the following steps: repeatedly triggering the transmit and receive circuit and the A/D converter to obtain a digitized composite signal through time-equivalent sampling; processing the digitized composite reflected signal to generate an A-scan signal; and wirelessly transmitting the data signal based on the A-scan signal for transmission to a discrete collection device.

Disclosed are embodiments of a multi-bank random access memory (RAM) structure that provides signal buffering at both the global and local connector level for improved performance. Specifically, inverters are incorporated into the global connector(s), which traverse groups of memory banks and which transmit signals (e.g., address signals, control signals, and/or data signals) from a memory controller, and also into alternating groups of local connectors, which connect nodes on the global connector(s) to corresponding groups of memory banks, such that any of the signals that are received by the memory banks from the memory controller via the global and local connectors are buffered by an even number of inverters and are thereby true signals. Signal buffering at both the global and local connector level results in relatively fast slews, short propagation delays, and low peak power consumption with minimal, if any, increase in area consumption.

Image forming apparatus communicates with a server computer and obtains information related to state of power supply from the server computer. Based on the obtained information, the image forming apparatus determines whether or not it is in a time zone of peak power consumption. If it is determined to be the time zone of peak power consumption, a method of counting the number of outputs is switched to a weighted counting method, for counting with weight added to the normal counting method.