72results about How to "Reduce peak power consumption" patented technology

The invention discloses a charge pump circuit of an EEPROM (Electrically Erasable Programmable Read-Only Memory) used for a passive UHF RFID (Ultra High Frequency Radio Frequency Identification Device) chip, which mainly solves the problem that the power consumption is overlarge during the charging period of the charge pump circuit of a conventional EEPROM. The charge pump circuit consists of a bi-phase non-overlapping clock generating circuit (201), a digital circuit (202), a control logic circuit (203) and a main charge pump (204), wherein the bi-phase non-overlapping clock generating circuit, the digital circuit and the control logic circuit convert input signals into n+2 bit clock signals which are fed into a main charge pump, the minus end of a capacitor C of an odd level unit of the charge pump is connected with a clk_bar; the minus end of a capacitor C of an even level unit of the charge pump is connected with clock control signals clk_2, clk_4,..., and clk_2n; and the minus end of an output level capacitor CL is connected with clock signals clk-L; an ith clock signal clk_2i delays for delta t compared with an i-1 clock signal clk_2, wherein i=1, 2,..., n, and then the effective clock signals are output, so that during the charging period, all the capacitors are charged simultaneously, and the charge pump circuit has the advantages of low power consumption during the charging period.