Permanent-fault-tolerant routing control method facing networks on chip

Abstract

The invention provides a permanent-fault-tolerant routing control method facing networks on chip (NoC). The permanent-fault-tolerant routing control method comprises the steps as follows: 1) the data sending volume of once communication is determined, and then first flood-overflowing routing selection is conducted by utilizing a neighbor substitution element priority level rule; 2) during the routing selection conducted after the first flood-overflowing routing selection, a deterministic routing is selected by utilizing a (n, k)-start graph node arrangement ring external element priority level rule. The invention provides the permanent-fault-tolerant routing control method facing the network-on-chip, which effectively reduces average transmission delay and peak power consumption and improves the NoC performance.

Description

technical field [0001] The invention relates to the technical field of computer reliability, in particular to a network-on-chip permanent fault-tolerant routing control method. Background technique [0002] With the development of semiconductor technology and multi-core technology, chip integration has reached an unprecedented level, and ultra-complex systems have emerged one after another. The traditional system on chip (SoC, System on Chip) architecture and its corresponding design methods have become the bottleneck of the development of system on chip. For this reason, the industry has proposed a network-on-chip (NoC) architecture based on network and routing communication. Structurally solve the problems caused by the bus architecture. However, as chips become smaller and more integrated, the interconnect lines in the chip are increasingly sensitive to deep submicron noise sources such as crosstalk, coupling noise, electromagnetic interference, and process instability, ...

AI Technical Summary

Problems solved by technology

However, as chips become smaller and more integrated, the interconnect lines in the chip are increasingly sensitive to deep submicron noise sources such as crosstalk, coupling noise, electromagnetic interference, and process instability, and data failures will occur in on-chip network communications. or functional component failure and other hardware failures, such as: routing failure, link failure, etc., which greatly reduces the reliability and stability of communication, thus affecting the performance of the NoC

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