12results about How to "Low power design" patented technology

The present invention relates to the field of reset circuit technology, and specifically discloses a power-on reset circuit and method, the circuit comprising: a voltage divider, including a voltage-dividing MOS tube and a voltage-dividing resistor, provided with a voltage-dividing output point, used to generate a trigger voltage division and adjust the power consumption of the power-on reset circuit; a hysteresis device, including a hysteresis MOS tube, electrically connected to the voltage-dividing output point, used to avoid reset voltage jitter caused by power supply voltage jitter; a comparator, the input end of which is electrically connected to the voltage-dividing output point, and the output end of which is electrically connected to the input end of the hysteresis device, used to convert the trigger voltage division into a logic signal; a buffer, the input end of which is electrically connected to the output end of the comparator, and the output end is used as the output end of the power-on reset circuit, used to increase the driving capability of the power-on reset circuit. The present invention has a precise trigger point, is insensitive to process angle and temperature changes, the trigger point changes with process angle, temperature, and power supply voltage within + / -100mV, and does not rise with the increase of power supply voltage, has a small area, and is low in cost.

The utility model provides a power supply circuit for a micro differential pressure transmitter and the transmitter. The power supply circuit comprises a power supply management module, a first power supply module and a second power supply module which are connected in sequence. The power management module is connected with an external power supply, and the power management module is used for outputting a first power supply with stable first voltage and first current. The first power supply module is used for outputting a second power supply to supply power to the display module of the transmitter. The third power supply circuit is connected to the common end of the first power module and the second power module. And the third power supply circuit supplies power to the micro differential pressure core body and the transmitting circuit of the transmitter, and the current value of the third power supply circuit is obtained by subtracting the working current of the second power supply module from the first current. According to the utility model, through accurate current control and distribution, stable current supply of the transmitter in different working states is ensured, and the problem of current fluctuation caused by working state switching of the digital micro-differential pressure core body in the existing micro-differential pressure transmitter is improved.

The invention provides an LED display module, an LED display system and electronic equipment, the LED display module comprises an LED display control chip and a plurality of LED lamps, the LED display control chip comprises a signal processing circuit, a voltage stabilizing circuit and a display control circuit, and the signal processing circuit comprises a processing unit, a power management unit and a display data processing unit. When the power management unit judges that the display type flag bit of the LED display module corresponds to the all-black display type, namely the display data is all-black data, a sleep control signal is generated to control the display control circuit to sleep, and meanwhile voltage is stopped being supplied to the display data processing unit by controlling the voltage stabilizing voltage. Therefore, when the LED display module is in an all-black display state, a circuit related to display is dormant, so that the energy consumption of an LED display control chip is reduced, and the low-power-consumption design is realized.

The invention discloses an input interface circuit suitable for a high-voltage chip, which is characterized in that a grid electrode of a first NMOS (N-channel Metal Oxide Semiconductor) tube is used as a signal input end, a source electrode of the first NMOS tube is connected to a ground potential of the high-voltage chip, a drain electrode of the first NMOS tube is connected with a drain electrode of a first PMOS (P-channel Metal Oxide Semiconductor) tube, a source electrode of the first PMOS tube is respectively connected with a hysteresis switching module, one end of a third resistor and a grid electrode of a third PMOS tube; the output of the voltage shaping module is fed back to the input end of the hysteresis switching module, and the output end of the voltage shaping module is used as the output end of the input interface circuit; the source electrode of the third PMOS tube, the hysteresis switching module and the other end of the third resistor are connected with the power supply potential of the high-voltage chip, the drain electrode of the third PMOS tube is connected with the input end of the voltage shaping module and one end of the fourth resistor, and the other end of the fourth resistor and the grid electrode of the first PMOS tube are connected to the relative ground potential in the high-voltage chip. Level conversion can be realized and power consumption is low.

This invention discloses an FPV unmanned aerial vehicle (UAV) identification method and apparatus based on analog image transmission signals. The method includes: S1, setting acquisition parameter information, including acquisition center frequency and acquisition bandwidth; S2, acquiring spatial electromagnetic wave signals based on the acquisition parameter information to obtain an acquisition signal; S3, performing identification processing on the acquisition signal to obtain an identification signal.

According to an embodiment of the present disclosure, a display device includes: a substrate including a display area displaying an image; a first thin film transistor disposed on the substrate and including a first semiconductor layer; and a signal line disposed on the substrate. The display area comprises a first area with a first transmission area and a second area outside the first area, and the signal lines comprise first signal lines arranged in the first area and second signal lines arranged in the second area. A part of the first signal line and the first semiconductor layer are arranged on the same layer, and the first signal line comprises an oxide semiconductor material.

The utility model discloses a kind of inspection well operation safety monitoring devices, including sensor module, wireless transmission module, positioning module, alarm module, display module, data acquisition processor and power module.Sensor module integrates methane, ammonia nitrogen, hydrogen sulfide, oxygen concentration sensor and liquid level sensor, realizes multi-parameter synchronous monitoring;Wireless transmission module supports 4G / 5G communication, and real-time upload data to monitoring platform;Positioning module provides accurate position information;Alarm module triggers sound-light alarm when parameter is over limit.The device solves the problem of single function and data isolation of traditional monitoring equipment, has remote monitoring, multi-parameter integration and efficient alarm capability, significantly improves the safety of inspection well operation.

The application discloses a vehicle-machine time calibration system and method based on vehicle-mounted central domain control and mobile phone Bluetooth communication, and comprises the following steps: obtaining mobile phone local time data by using a mobile phone terminal time calibration software, and encapsulating the mobile phone local time data into a standardized time data packet; after two-way identity authentication of the mobile phone terminal time calibration software and a vehicle-mounted Bluetooth communication unit is successful, the mobile phone terminal time calibration software transmits the standardized time data packet to a vehicle-mounted central domain controller through an optimized vehicle-mounted Bluetooth communication protocol; time data analysis is performed on the standardized time data packet received by the vehicle-mounted central domain controller to obtain standard time data, data integrity check is performed on the standard time data, the standard time data that passes the data integrity check is taken as a reference, time errors caused by vehicle-mounted real-time clock chip drift are corrected, modified standard time is obtained, and the vehicle-mounted central domain controller synchronizes the modified standard time to vehicle domain controllers.

The present invention relates to a photoelectrically isolated universal chip-type CAN bus microsystem packaging structure, which belongs to the field of microelectronics. The structure includes an integrated tube shell, a CAN bus transceiver, a photoelectric coupling module, a digital signal processor, an SRAM and an EEPROM; the integrated tube shell is used to encapsulate and connect the remaining modules; the CAN bus transceiver provides differential signal transmission and reception capabilities; the photoelectric coupling module is between the CAN bus transceiver and the digital signal processor, and is used to isolate the signal; the digital signal processor provides control, processing and partial interfaces for the system; the SRAM is connected to the digital signal processor through an interface to provide high-speed data cache; the EEPROM is connected to the digital signal processor through an interface to store setting data. The present invention has strong versatility, high integration, small size, high reliability, and rich peripheral interfaces, and can be widely used to replace the CAN bus control system in existing equipment.

The invention discloses a dust accumulation amount and full-scale dust concentration online monitoring device and system, the device comprises a dust accumulation bin, a weighing assembly and a dust module, the lower end of the dust accumulation bin is connected with the weighing assembly, and the lower end of the weighing assembly is connected with the dust module. The dust accumulation bin comprises an upper dust accumulation bin, and the lower end of the upper dust accumulation bin is in threaded connection with a lower dust accumulation bin. The weighing assembly comprises a balance, a lifting mechanism is fixedly arranged at the left end of the balance, the top end of the lifting mechanism is movably connected with a lifter tray, and the lifter tray is fixedly connected with a dust accumulation disc. The dust module comprises a dilution bin, a first pipe, a first valve, a second pipe, a second valve, a third valve, a third pipe, a fourth valve, a fourth pipe, a fifth valve and a sixth valve are arranged on the outer wall of the dilution bin, the sampling pipe and the dust concentration sensor form a closed and open environment, and the specific state is controlled by the corresponding valves.

Embodiments of the present application provide a computing chip, a data processing method and device, equipment and a storage medium, and relate to the technical field of chips. The computing chip comprises at least one computing cluster, and the computing cluster comprises: a plurality of memory and calculation units, each memory and calculation unit comprising a calculation module and a memory module physically integrated with the calculation module; a cluster center; a cluster shared memory, which is in communication connection with the cluster center and in communication connection with each calculation module in the plurality of memory and calculation units through the cluster center; and a network on chip, the cluster center of each computing cluster being connected to the network on chip. Efficient access to local data is achieved by physical integration of memory and calculation, cross-storage access paths are optimized by cluster-level cluster shared memory, the interaction logic of the network on chip is simplified by a hierarchical communication architecture, and the data transmission efficiency of the calculation module is improved. By reducing access requests of the network on chip and simplifying network design, the access traffic and power consumption of the network on chip are reduced, and the chip area and hardware cost are reduced.

The invention discloses a diversity receiving photon chip for space optical communication, solves the problem of high power consumption when the influence caused by phase distortion and light beam pointing error is corrected in the existing free space optical communication, and belongs to the field of optical communication. The system comprises a grating array, an MZI network and a control circuit. The grating array is a combination of a plurality of densely-arranged gratings, and the input light source adopts a lens to converge input spatial light which enters the grating array at a set angle; according to the grating design, the high duty ratio can be achieved, and meanwhile optical signal coupling between gratings, between the grating and the transmission waveguide and between the transmission waveguides is avoided, so that the receiving efficiency and the receiving signal quality are prevented from being reduced. The grating array transmits the received light to the waveguides connected with the gratings and accesses the MZI network through the waveguides, the MZI network is used for realizing optical coherent beam combination, and the control circuit controls the combination of light beams in the MZI network.