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Semiconductor apparatus and test method

A technology of semiconductor and test pulse, which is applied in the direction of single semiconductor device test, semiconductor/solid-state device test/measurement, measuring device, etc. It can solve the problems such as difficult to check the bad starter, unable to test the signal, etc.

Inactive Publication Date: 2015-03-18
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, since the micro-bump is too small, the pins of the test device cannot be in contact with the micro-bump, so it cannot be tested whether the signal output to the micro-bump via the driver is normal, making it difficult to check whether the starter is defective

Method used

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  • Semiconductor apparatus and test method
  • Semiconductor apparatus and test method
  • Semiconductor apparatus and test method

Examples

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Embodiment Construction

[0016] Hereinafter, the semiconductor device and the testing method according to the present invention will be described through various embodiments with reference to the accompanying drawings.

[0017] Such as figure 1 As shown in, the semiconductor device according to one embodiment of the present invention may include a test driver selection unit 100, a first driver 200, and a second driver 300.

[0018] The test driver selection unit 100 respectively enables the first test driver selection signal T_ds1 and the second test driver selection signal T_ds2 in a regular sequence in response to the test pulse T_pulse and the test clock T_clk. For example, whenever the test pulse T_pulse is input and the test clock T_clk is converted to a specific level, the test driver selection unit 100 may enable the first test driver selection signal T_ds1 and the second test driver selection signal T_ds2 in a regular sequence. In addition, when the test clock T_clk is converted to a specific level...

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PUM

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Abstract

A test driver selection unit configured to enable a plurality of test driver selection signals in response to a test pulse and a test clock, and a plurality of drivers configured to receive the plurality of test driver selection signals, wherein each of the plurality of drivers is configured to output an output signal to a data bump in response to a test driver selection signal, data, and an output enable signal, and to receive a first driving voltage and a second driving voltage.

Description

[0001] Cross references to related applications [0002] This application claims priority for the Korean patent application with the application number 10-2013-0104933 filed with the Korean Intellectual Property Office on September 2, 2013, the entire contents of which are incorporated herein by reference. Technical field [0003] Various embodiments relate to a semiconductor integrated circuit, and more particularly to a semiconductor device. Background technique [0004] The semiconductor device includes a configuration for receiving a signal from the outside and outputting the signal to the outside. [0005] The configuration in the semiconductor device for outputting signals to the outside is called a driver, where the driver must normally send the signal to the external device in order for the semiconductor device to operate normally. [0006] In consideration of the high integration and miniaturization of semiconductor devices, the size of pads that electrically couple the semico...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/26
CPCH01L22/00G01R31/2884G01R31/26G01R31/3183
Inventor 李东郁
Owner SK HYNIX INC