Reconstruction method and device for programmable logic device

Abstract

The invention provides a reconstruction method and device for a programmable logic device. The reconstruction method comprises the steps that a to-be-reconstructed resource area of the programmable logic device is determined; the to-be-reconstructed resource area is divided into one or more basic units, and the basic units comprise one or more reconstructable devices; reconstruction is performed on each basic unit. Through the performance of the reconstruction method and device for the programmable logic device, the to-be-reconstructed resource area of the programmable logic device is determined as needed, the to-be-reconstructed resource area is divided into the basic units, the reconstruction is performed on each basic unit, and a reconstruction technique which regards the basic units as the minimum reconstruction units is achieved; compared with an existing reconstruction technique which regards basic devices as the minimum reconstruction units, the minimum reconstruction range is enlarged, the needed quantity of control signals and data flow when the reconstruction is performed can be both reduced, and the multifarious degree and reconstruction cost of the programmable logic device is reduced.

Description

technical field [0001] The invention relates to the application field of programmable logic devices, in particular to a programmable logic device reconfiguration method and device. Background technique [0002] For programmable logic devices such as FPGA (Field-Programmable Gate Array, Field Programmable Gate Array), you only need to use the development tool to convert the designed circuit into a bit stream file and import it to get the desired circuit function. Compared with the tape-out cost, it is more flexible and can be reprogrammed to achieve different logic functions. [0003] While programmable logic devices are convenient for users to use, they also have some disadvantages. For example, when using zynq 7000 series SoC FPGA for circuit design, the existing FPGA reconfigurable technology adopts the configuration frame method, and the basic logic unit (lookup table , flip-flops, CLB, IOB and other basic devices) to achieve fine-grained reconstruction, this method need...

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Problems solved by technology

[0003] While the programmable logic device is convenient for users to use, it also has some disadvantages. For example, when using the Zynq 7000 series SoC FPGA for circuit design, the existing FPGA reconfigurable technology adopts the configuration frame method, and the basic logic unit (lookup table , triggers, CLB, IOB and other basic devices) to achieve fine-grained reconstruction, this method needs to generate bit stream files of all circuits according to the reconfigured target circuit, and send the bit stream data required for reconstruction to these basic devices, These basic devices have been updated and reconfigured. This type of FPGA chip structure design is difficult to implement, the chip area is large, and the chip cost is high.

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