Microprocessor post-silicon verification device and verification method for compatible design
A technology of a microprocessor and a verification device, which is used in electrical digital data processing, special data processing applications, instruments, etc., can solve the problems of low verification result inspection efficiency, slow test stimulus generation, and slow test stimulus generation.
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[0095] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.
[0096] figure 1 It is a structural diagram of the "master-slave" dual-chip verification device of the present invention. The "master-slave" double-chip verification device in the present invention mainly includes a debugging host, a development board, a master control chip and a slave control chip.
[0097] The debugging host is connected with the main control chip and the slave control chip. The debugging host is connected to the main control chip through JTAG1, and connected to the slave control chip through JTAG2. Run the master / slave chip development environment on the debugging host, edit, compile and load the executable programs of the master chip and the slave chip, receive the data returned by the chip in real time during the operation of the master chip and the slave chip, and control The execution state of the chip.
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