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Microprocessor post-silicon verification device and verification method for compatible design

A technology of a microprocessor and a verification device, which is used in electrical digital data processing, special data processing applications, instruments, etc., can solve the problems of low verification result inspection efficiency, slow test stimulus generation, and slow test stimulus generation.

Active Publication Date: 2017-06-27
NAT UNIV OF DEFENSE TECH
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0007] The technical problem to be solved by the present invention is to propose an accurate and efficient verification of microprocessor functions for the problems of slow test stimulus generation speed, low verification result inspection efficiency and complicated control in the realization of microprocessor post-silicon function compatibility verification technology. Compatible devices and methods solve the problems of slow generation of test incentives, low efficiency of verification result checks, and complex hardware platform control during verification of compatible chips, improve verification quality, and shorten verification cycles

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  • Microprocessor post-silicon verification device and verification method for compatible design
  • Microprocessor post-silicon verification device and verification method for compatible design
  • Microprocessor post-silicon verification device and verification method for compatible design

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Embodiment Construction

[0095] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0096] figure 1 It is a structural diagram of the "master-slave" dual-chip verification device of the present invention. The "master-slave" double-chip verification device in the present invention mainly includes a debugging host, a development board, a master control chip and a slave control chip.

[0097] The debugging host is connected with the main control chip and the slave control chip. The debugging host is connected to the main control chip through JTAG1, and connected to the slave control chip through JTAG2. Run the master / slave chip development environment on the debugging host, edit, compile and load the executable programs of the master chip and the slave chip, receive the data returned by the chip in real time during the operation of the master chip and the slave chip, and control The execution state of the chip.

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Abstract

The invention discloses microprocessor silicone-fed verification device and method for compatibility design, and aims at solving the problems of slow test excitation generation, low verification result examination and complex control in the existing microprocessor silicone-fed function compatibility verification technology. The device is of a main-secondary double-chip structure, comprising a debugging host, a development board, a main control chip and a secondary control chip; a main control program and a secondary control program are set in the debugging host; the main control chip and the secondary control chip respectively load and operate the main control program and the secondary control program to generate and operate test excitation, then the operation results of the main control chip and the secondary control chip to the test excitation programs are compared through the main control program, and finally the verification result is displayed through the debugging host. With the adoption of the device, the verification process is free of artificial interference; a hardware platform is simple to control; the silicone-fed verification accuracy and verification efficiency can be effectively increased.

Description

technical field [0001] The invention relates to the field of post-silicon function verification of microprocessors, in particular to a device and method for computing post-silicon function verification of a compatible chip instruction set. Background technique [0002] Military microprocessors (including CPUs and DSPs) are widely used in missiles, satellites, aircraft, ships, radars, tanks, and military secure communications. Due to the large number of foreign chips imported, facing the threat of embargo and outage, and the hidden dangers of safety and reliability, it is of great significance to independently develop compatible military microprocessors and realize localization substitution. [0003] The compatibility referred to in the present invention mainly refers to self-developed microprocessors and the realization of pluggable and replaceable use of foreign microprocessors. For the convenience of description, the present invention refers to the foreign microprocessor ...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50
Inventor 郭阳刘畅扈啸陈书明陈跃跃孙永节鲁建壮刘宗林
Owner NAT UNIV OF DEFENSE TECH