Fully self-aligned high-density trench gate field-effect semiconductor device manufacturing method
A device manufacturing method and self-alignment technology, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of high registration accuracy and difficulty in achieving higher density cells
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Embodiment approach 1
[0030] Fully self-aligned high-density trench gate field effect semiconductor device manufacturing method, using polysilicon, the interface movement after thermal oxidation and the insulating film commonly used in the process, has the characteristics of relatively high etching selection ratio, and realizes the field of the trench structure The original cell of the effect device in the active area uses a photolithography plate to realize the full self-alignment of the source area, contact hole (P+ implant) and trench gate. Taking DMOSFET as an example, the process steps achieved:
[0031] Step 1. P-well implantation is performed on the surface of the N-type silicon wafer, and the P-well region is pushed through diffusion to form The oxide layer SiO2, the oxide layer is used as the subsequent deposited polysilicon stress matching layer; figure 1 Shown.
[0032] Step 2: Deposit polysilicon on the stress matching layer, and then deposit an oxide layer on the polysilicon; thermal oxida...
Embodiment approach 2
[0049] The manufacturing method of a fully self-aligned high-density trench gate field effect semiconductor device, taking DMOSFET as an example, the process steps achieved:
[0050] Step 1. P-well implantation is performed on the surface of the N-type silicon wafer, and the P-well region is pushed through diffusion to form The oxide layer SiO2 is used as the subsequent deposited polysilicon stress matching layer.
[0051] Step 2, depositing polysilicon on the stress matching layer, and then depositing an oxide layer on the polysilicon; thermal oxidation can also be used to grow an oxide layer on the polysilicon.
[0052] In step 3, photolithography is performed on the structure formed in step 2 to remove the oxide layer and polysilicon to form a trench etching window.
[0053] Step 4. Deposit TEOS film.
[0054] Step 5. Perform Spacer etching to form sidewalls on the side of the polysilicon, such as Figure 18 .
[0055] Steps 6 to 17 are the same as in the first embodiment.
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