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Manufacturing method of fully-automatically-aligned high-density groove gate field effect semiconductor device

A device manufacturing method and self-alignment technology, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of high registration accuracy and difficulty in achieving higher density cells

Active Publication Date: 2015-05-20
JILIN SINO MICROELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At the same time, the contact hole adopts photolithography method, which requires high registration accuracy of photolithography, and it is difficult to achieve higher density cells.

Method used

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  • Manufacturing method of fully-automatically-aligned high-density groove gate field effect semiconductor device
  • Manufacturing method of fully-automatically-aligned high-density groove gate field effect semiconductor device
  • Manufacturing method of fully-automatically-aligned high-density groove gate field effect semiconductor device

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Experimental program
Comparison scheme
Effect test

Embodiment approach 1

[0030] Fully self-aligned high-density trench gate field-effect semiconductor device manufacturing method, using polysilicon, the thermal oxidation of the interface movement and the insulation film commonly used in the process, has the characteristics of relatively high etching selectivity, and realizes the field effect of the trench structure. The effect device uses a photolithography plate in the original cell of the active area to realize the full self-alignment of the source area, contact hole (P+ injection) and groove gate. Taking DMOSFET as an example, the realized process steps:

[0031] Step 1: Perform P-well implantation on the surface of the N-type silicon wafer, form a P-well region by diffusion and push the junction, and form The oxide layer SiO2, the oxide layer as a subsequent deposition of polysilicon stress matching layer; as figure 1 shown.

[0032] Step 2, deposit polysilicon on the stress matching layer, and then deposit an oxide layer on the polysilicon;...

Embodiment approach 2

[0049]Fully self-aligned high-density trench gate field-effect semiconductor device manufacturing method, taking DMOSFET as an example, the process steps realized:

[0050] Step 1, perform P-well implantation on the surface of N-type silicon wafer, form P-well region by diffusion and push junction, and form The oxide layer SiO2, the oxide layer as the subsequent deposition of polysilicon stress matching layer.

[0051] Step 2: Deposit polysilicon on the stress matching layer, and then deposit an oxide layer on the polysilicon; thermal oxidation may also be used to grow an oxide layer on the polysilicon.

[0052] In step 3, photolithography is performed on the structure formed in step 2 to remove the oxide layer and polysilicon to form a trench etching window.

[0053] Step 4, depositing a TEOS film.

[0054] Step 5, perform Spacer etching, and form sidewalls on the side of the polysilicon, such as Figure 18 .

[0055] Steps 6 to 17 are the same as those in Embodiment 1.

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Abstract

The invention provides a manufacturing method of a fully-automatically-aligned high-density groove gate field effect semiconductor device and belongs to the technical field of semiconductor devices. Aiming at the problem in the prior art that primitive cells with higher density are very difficultly realizes by a field effect semiconductor device with a groove structure, the manufacturing method comprises the following steps: carrying out P trap injection on the surface of an N type silicon wafer; diffusing a knot pushing type P trap region to form an oxidized layer; depositing polycrystalline silicon and depositing the oxidized layer; carrying out photoetching etching to remove the oxidized layer and the polycrystalline silicon; oxidizing; carrying out Spacer etching; removing the oxidized layer on the side face of the polycrystalline silicon; carrying out sacrificial oxidization; carrying out gate oxidization; injection source region ions, and moving the side face of the polycrystalline silicon to realize automatically-aligned injection of a source region; depositing an insulating layer; re-etching the insulating layer to expose the polycrystalline silicon; etching the polycrystalline silicon and removing the polycrystalline silicon; depositing an oxidized film and carrying out the Spacer etching to etch a P<+> injection window; carrying out P<+> injection; thinning the thickness of the insulating layer and enlarging area for exposing an N<+> source region; flattening the surface; metallizing the surface of the wafer.

Description

technical field [0001] The invention relates to a method for manufacturing a field effect semiconductor device with a groove structure, and belongs to the technical field of semiconductor devices. Background technique [0002] In the field of power semiconductor device technology, trench structure field effect semiconductor devices have been widely used. The main purpose of field effect semiconductor devices using trench structure is to increase the density of primary cells and reduce the on-resistance per unit area. [0003] The implementation of field effect semiconductor devices with existing trench structures requires at least trench masking layer photolithography and contact hole photolithography. [0004] In order to achieve high-density primitive cells and break through the limitation of lithography precision, a Spacer is formed on the edge of the etching masking film of the silicon groove to reduce the width of the etching masking film of the silicon groove, realize ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/28H01L21/336
CPCH01L29/4236H01L29/66666
Inventor 左义忠贾国高宏伟张海宇
Owner JILIN SINO MICROELECTRONICS CO LTD